參數(shù)資料
型號(hào): AD7191BRUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 11/21頁(yè)
文件大小: 0K
描述: IC ADC 2CH 24B SD 24TSSOP
產(chǎn)品培訓(xùn)模塊: Weigh Scale Introduction
設(shè)計(jì)資源: Precision Weigh Scale Design Using AD7191 with Internal PGA (CN0118)
標(biāo)準(zhǔn)包裝: 62
位數(shù): 24
采樣率(每秒): 120
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
輸入數(shù)目和類型: 2 個(gè)差分,雙極
產(chǎn)品目錄頁(yè)面: 777 (CN2011-ZH PDF)
AD7191
Rev. A | Page 18 of 20
In systems where the AGND and DGND pins are connected
somewhere else in the system(that is, at the system power
supply), they should not be connected again at the AD7191
because a ground loop results. In these situations, it is
recommended that the AD7191 AGND and DGND pins be tied
to the AGND plane. In any layout, it is important that the user
keep in mind the flow of currents in the system, ensuring that
the return paths for all currents are as close as possible to the
paths the currents took to reach their destinations. Avoid
forcing digital currents to flow through the AGND sections of
the layout.
Avoid running digital lines under the device because these
couple noise onto the die. The analog ground plane should be
allowed to run under the AD7191 to prevent noise coupling.
The power supply lines to the AD7191 should use as wide a
trace as possible to provide low impedance paths and reduce
the effects of glitches on the power supply line. Fast switching
signals like clocks should be shielded with digital ground to
avoid radiating noise to other sections of the board, and clock
signals should never be run near the analog inputs. Avoid
crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other.
This reduces the effects of feedthrough through the board.
A microstrip technique is by far the best but is not always
possible with a double-sided board. In this technique, the
component side of the board is dedicated to ground planes,
and signals are placed on the solder side.
Good decoupling is important when using high resolution
ADCs. All analog supplies should be decoupled with 10 μF
tantalum capacitors in parallel with 0.1 μF capacitors to AGND.
To achieve the best from these decoupling components, they
have to be placed as close as possible to the device, ideally right
up against the device. All logic chips should be decoupled with
0.1 μF ceramic capacitors to DGND. In systems where a
common supply voltage is used to drive both the AVDD and
DVDD of the AD7191, it is recommended that the system AVDD
supply be used. This supply should have the recommended
analog supply decoupling capacitors between the AVDD pin of
the AD7191 and AGND, and the recommended digital supply
decoupling capacitor between the DVDD pin of the AD7191 and
DGND.
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