參數(shù)資料
型號(hào)： AD7142ACPZ-REEL
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 31/73頁(yè)
文件大小： 0K
描述： IC CAP-TO-DGTL CONV PROG 32LFCSP
標(biāo)準(zhǔn)包裝： 1
類(lèi)型： 電容數(shù)字轉(zhuǎn)換器
分辨率（位）： 16 b
采樣率（每秒）： 250k
數(shù)據(jù)接口： 串行
電壓電源： 單電源
電源電壓： 2.6 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面： 781 (CN2011-ZH PDF)
其它名稱(chēng)： AD7142ACPZ-REELDKR
AD7142
Rev. A | Page 36 of 72
PCB DESIGN GUIDELINES
CAPACITIVE SENSOR BOARD MECHANICAL SPECIFICATIONS
Table 18.
Parameter
Symbol
Min
Typ
Max
Unit
Distance from Edge of Any Sensor to Edge of Grounded Metal Object
D1
0.1
mm
Distance Between Sensor Edges1
D2 = D3 = D4
0
mm
Distance Between Bottom of Sensor Board and Controller Board or Grounded
Metal Casing2
D5
1.0
mm
1 The distance is dependent on the application and the positioning of the switches relative to each other and with respect to the user’s finger positioning and handling.
Adjacent sensors, with 0 minimum space between them, are implemented differentially.
2 The 1.0 mm specification is meant to prevent direct sensor board contact with any conductive material. This specification does not guarantee no EMI coupling from
the controller board to the sensors. Address potential EMI coupling issues by placing a grounded metal shield between the capacitive sensor board and the main
controller board as shown in Figure 55.
05
70
2-
04
5
SLIDER
BUTTONS
CAPACITIVE SENSOR
PRINTED CIRCUIT
D1
D3
D4
8-WAY
SWITCH
METAL OBJECT
D2
Figure 53. Capacitive Sensor Board Mechanicals Top View
D5
CONTROLLER PRINTED CIRCUIT BOARD OR METAL CASING
0
57
02
-0
47
CAPACITIVE SENSOR BOARD
Figure 54. Capacitive Sensor Board Mechanicals Side View
CAPACITIVE SENSOR BOARD
D5
CONTROLLER PRINTED CIRCUIT BOARD OR METAL CASING
GROUNDED METAL SHIELD
057
02
-04
6
Figure 55. Capacitive Sensor Board with Grounded Shield
CHIP SCALE PACKAGES
The lands on the chip scale package (CP-32-3) are rectangular.
The printed circuit board pad for these should be 0.1 mm
longer than the package land length, and 0.05 mm wider than
the package land width. Center the land on the pad to maximize
the solder joint size.
The bottom of the chip scale package has a central thermal pad.
The thermal pad on the printed circuit board should be at least
as large as this exposed pad. To avoid shorting, provide a
clearance of at least 0.25 mm between the thermal pad and the
inner edges of the land pattern on the printed circuit board.
Thermal vias can be used on the printed circuit board thermal
pad to improve thermal performance of the package. If vias are
used, they should be incorporated in the thermal pad at a
1.2 mm pitch grid. The via diameter should be between 0.3 mm
and 0.33 mm, and the via barrel should be plated with 1 oz.
copper to plug the via.
Connect the printed circuit board thermal pad to GND.
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