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| 型號： | AD6645ASVZ-105 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 105MSPS 52TQFP |
| 設(shè)計資源： | Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109) |
| 標準包裝： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 105M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 功率耗散（最大）： | 1.75W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -10°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 52-TQFP 裸露焊盤 |
| 供應商設(shè)備封裝： | 52-TQFP-EP（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
AD6645
Rev. D | Page 15 of 24
TERMINOLOGY
Analog Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between the 50% point of the rising edge of the
encode command and the instant at which the analog input is
sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Differential Analog Input Resistance, Differential Analog
Input Capacitance, and Differential Analog Input Impedance
The real and complex impedances measured at each analog
input port. The resistance is measured statically and the
capacitance and differential input impedances are measured
with a network analyzer.
Differential Analog Input Voltage Range
The peak-to-peak differential voltage that must be applied to
the converter to generate a full-scale response. The peak differential
voltage is computed by observing the voltage on a single pin and
subtracting the voltage from the other pin, which is 180° out of
phase. The peak-to-peak differential is computed by rotating the
inputs’ phase 180°and taking the peak measurement again. The
difference is then computed between both peak measurements.
Differential Nonlinearity
The deviation of any code width from an ideal 1 LSB step.
Encode Pulse Width/Duty Cycle
Pulse width high is the minimum amount of time that the
encode pulse should be left in a high state to achieve rated
performance; pulse width low is the minimum time that
the encode pulse should be left in a low state. See timing
these specifications define an acceptable encode duty cycle.
Full-Scale Input Power
The full-scale input power is expressed in dBm and can be
calculated by using the following equation:
=
001
.
0
2
log
10
Input
Z
rms
Scale
Full
V
Scale
Full
Power
Harmonic Distortion, Second
The ratio of the rms signal amplitude to the rms value of the
second harmonic component, reported in dBc.
Harmonic Distortion, Third
The ratio of the rms signal amplitude to the rms value of the
third harmonic component, reported in dBc.
Integral Nonlinearity
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a best straight line
determined by a least square curve fit.
Maximum Conversion Rate
The encode rate at which parametric testing is performed.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed limit.
Noise (for Any Range Within the ADC)
×
=
10
001
.
0
dBFS
dBc
dBm
NOISE
Signal
SNR
FS
Z
V
where:
Z is the input impedance.
FS is the full scale of the device for the frequency in question.
SNR is the value for the particular input level.
Signal is the signal level within the ADC reported in dB below
full scale. This value includes both thermal noise and quantiza-
tion noise.
Output Propagation Delay
The delay between a differential crossing of ENCODE and
ENCODE and the time when all output data bits are within
valid logic levels.
Power Supply Rejection Ratio (PSSR)
The ratio of a change in input offset voltage to a change in
power supply voltage.
Power Supply Rise Time
The time from when the dc supply is initiated until the supply
output reaches the minimum specified operating voltage for the
ADC. The dc level is measured at the supply pin(s) of the ADC.
Signal-to-Noise-and-Distortion (SINAD)
The ratio of the rms signal amplitude (set at 1 dB below full scale)
to the rms value of the sum of all other spectral components,
including harmonics, but excluding dc.
Signal-to-Noise Ratio (Without Harmonics)
The ratio of the rms signal amplitude (set at 1 dB below full scale)
to the rms value of the sum of all other spectral components,
excluding the first five harmonics and dc.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6645ASVZ-1051 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 80 MSPS/105 MSPS A/D Converter |
| AD6645ASVZ-80 | 功能描述:IC ADC 14BIT 80MSPS 52TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD6645ASVZ-80 | 制造商:Analog Devices 功能描述:ADC, 14BIT, 80MSPS, TQFP-52 |
| AD6645ASVZ-801 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 80 MSPS/105 MSPS A/D Converter |
| AD6645-MIL/PCB | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 AD6645-MIL/PCB EVAL. BD. RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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