AVCC
參數(shù)資料
型號: AD6645ASVZ-105
廠商: Analog Devices Inc
文件頁數(shù): 22/24頁
文件大?。?/td> 0K
描述: IC ADC 14BIT 105MSPS 52TQFP
設(shè)計資源: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
標準包裝: 1
位數(shù): 14
采樣率(每秒): 105M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 4
功率耗散(最大): 1.75W
電壓電源: 模擬和數(shù)字
工作溫度: -10°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 52-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 52-TQFP-EP(10x10)
包裝: 托盤
輸入數(shù)目和類型: 1 個差分,雙極
AD6645
Rev. D | Page 7 of 24
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Rating
Electrical
AVCC Voltage
0 V to 7 V
DVCC Voltage
0 V to 7 V
Analog Input Voltage
0 V to AVCC
Analog Input Current
25 mA
Digital Input Voltage
0 V to AVCC
Digital Output Current
4 mA
Environmental
Operating Temperature Range (Ambient)
AD6645-80
40°C to +85°C
AD6645-105
10°C to +85°C
Maximum Junction Temperature
150°C
Lead Temperature (Soldering, 10 sec)
300°C
Storage Temperature Range (Ambient)
65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
The heat sink of the AD6645ASVZ, 52-lead TQFP_EP (SV-52-1)
package must be soldered to the PCB GND plane to meet thermal
specifications.
Table 6. Thermal Characteristics
Package Type
Rating
52-Lead TQFP_EP
23°C/W, soldered heat sink
17°C/W, soldered heat sink
2°C/W, soldered heat sink
30°C/W, unsoldered heat sink
24°C/W, unsoldered heat sink
23°C/W, soldered heat sink
17°C/W, soldered heat sink
2°C/W
1 Per JEDEC JESD51-2 (heat sink soldered to PCB).
2 2S2P JEDEC test board.
3 Values of
θ
JA
are provided for package comparison and PCB design
considerations.
4 Per JEDEC JESD51-6 (heat sink soldered to PCB).
5 Airflow increases heat dissipation, effectively reducing θJA. Furthermore, the
more metal that is directly in contact with the package leads from metal
traces, throughholes, ground, and power planes, the more θJA is reduced.
6 Per MIL-STD-883, Method 1012.1.
7 Values of
θ
JC
are provided for package comparison and PCB design
considerations when an external heat sink is required.
Values of θJA are provided for package comparison and PCB
design considerations. θJA can be used for a first-order
approximation of TJ by the equation
TJ = TA + (θJA × PD)
where:
TA is the ambient temperature (°C).
PD is the power dissipation (W).
EXPLANATION OF TEST LEVELS
I.
100% production tested.
II.
100% production tested at 25°C and guaranteed by design
and characterization at temperature extremes.
III.
Sample tested only.
IV.
Parameter is guaranteed by design and characterization
testing.
V.
Parameter is a typical value only.
ESD CAUTION
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