AD652
Rev. C | Page 4 of 28
AD652JP/AQ/SQ
AD652KP/BQ
Parameter
Min     Typ    Max     Min    Typ     Max     Unit
COMPARATOR
Input Bias Current
0.5     5
0.5     5
礎
Common-Mode Voltage
VS + 4   
+ VS 4   VS + 4   
+VS 4    V
CLOCK INPUT
Maximum Frequency
4
5
4
5
MHz
Threshold Voltage (Referred to Pin 12)
1.2     
1.2     
V
T
MIN
to T
MAX
0.8     
2.0
0.8     
2.0
V
Input Current
(VS < VCLK < +VS)
5
20
5
20
礎
Voltage Range
VS     
+VS
VS    
+VS
V
Rise Time
2
2
祍
OUTPUT STAGE
VOL (IOUT = 10 mA)
0.4
0.4
V
I
OL
V
OL
< 0.8 V
15
15
mA
VOL < 0.4 V, TMIN to TMAX
8
8
mA
I
OH
(Off Leakage)
0.01    10
0.01     10
礎
Delay Time, Positive Clock Edge to Output Pulse
150
200
250     150
200
250
ns
Fall Time (Load = 500 pF and ISINK = 5 mA)
100     
100     
ns
Output Capacitance
5
5
pF
OUTPUT ONE-SHOT
Pulse Width, tOS
COS = 300 pF
1
1.5     2
1
1.5     2
祍
C
OS
= 1000 pF
4
5
6
4
5
6
祍
REFERENCE OUTPUT
Voltage
4.950    5.0     5.050    4.975   5.0     5.025     V
Drift
100     
50
ppm/癈
Output Current
Source TMIN to TMAX
10     
10     
mA
Sink
100     500     
100     500     
礎
Power Supply Rejection
Supply Range = ?2.5 V to ?7.5 V
0.015     
0.015     %/V
Output Impedance (Sourcing Current)
0.3     2
0.3     2
&
POWER SUPPLY
Rated Voltage
?5    
?5    
V
Operating Range
Dual Supply
?     ?5    ?8     ?     ?5     ?8
V
Single Supply (V
S
= 0)
+12     
+36     +12    
+36
V
Quiescent Current
?1    ?/SPAN>15     
?1     ?/SPAN>15
mA
Digital Common
VS     
+VS 4    VS    
+VS 4    V
Analog Common
V
S
+V
S
V
S
+V
S
V
TEMPERATURE RANGE
Specified Performance
JP, KP Grade
0
+70     0
+70
癈
AQ, BQ Grade
40     
+85     40    
+85
癈
SQ Grade
55     
+125     
癈
1
Referred to internal V
REF
. In PLCC package, tested on 10 V input range only.