參數(shù)資料
型號: AD603ARZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 8/25頁
文件大?。?/td> 0K
描述: IC AMP VGA 90MHZ LN 50MA 8SOIC
標準包裝: 750
系列: X-AMP®
放大器類型: 可變增益
電路數(shù): 1
轉(zhuǎn)換速率: 275 V/µs
-3db帶寬: 90MHz
電流 - 輸入偏壓: 200nA
電流 - 電源: 12.5mA
電流 - 輸出 / 通道: 50mA
電壓 - 電源,單路/雙路(±): 9.5 V ~ 12.6 V,±4.75 V ~ 6.3 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SO
包裝: 帶卷 (TR)
配用: AD603-EVALZ-ND - BOARD EVALUATION FOR AD603
Data Sheet
AD603
Rev. K | Page 15 of 24
USING THE AD603 IN CASCADE
Two or more AD603s can be connected in series to achieve
higher gain. Invariably, ac coupling must be used to prevent the
dc offset voltage at the output of each amplifier from overloading
the following amplifier at maximum gain. The required high-
pass coupling network is usually just a capacitor, chosen to set
the desired corner frequency in conjunction with the well-
defined 100 Ω input resistance of the following amplifier.
For two AD603s, the total gain control range becomes 84 dB
(2 × 42.14 dB); the overall 3 dB bandwidth of cascaded stages
is somewhat reduced. Depending on the pin strapping, the gain
and bandwidth for two cascaded amplifiers can range from
22 dB to +62 dB (with a bandwidth of about 70 MHz) to
+22 dB to +102 dB (with a bandwidth of about 6 MHz).
There are several ways of connecting the gain control inputs
in cascaded operation. The choice depends on whether it is
important to achieve the highest possible instantaneous signal-
to-noise ratio (ISNR), or, alternatively, to minimize the ripple
in the gain error. The following examples feature the AD603
programmed for maximum bandwidth; the explanations apply
to other gain/bandwidth combinations with appropriate
changes to the arrangements for setting the maximum gain.
SEQUENTIAL MODE (OPTIMAL SNR)
In the sequential mode of operation, the ISNR is maintained at
its highest level for as much of the gain control range as possible.
Figure 37 shows the SNR over a gain range of 22 dB to +62 dB,
assuming an output of 1 V rms and a 1 MHz bandwidth. Figure 38,
Figure 39, and Figure 40 show the general connections to
accomplish this. Here, both the positive gain control inputs
(GPOS) are driven in parallel by a positive-only, ground-referenced
source with a range of 0 V to 2 V, while the negative gain
control inputs (GNEG) are biased by stable voltages to provide
the needed gain offsets. These voltages may be provided by
resistive dividers operating from a common voltage reference.
00
53
9-
0
3
5
VC (V)
2.2
–0.2
0.6
0.2
1.4
1.0
1.8
S
NR
(
d
B)
90
80
85
70
75
65
55
60
50
Figure 37. SNR vs. Control Voltage, Sequential Control (1 MHz Bandwidth)
31.07dB
–42.14dB
GPOS
GNEG
31.07dB
–42.14dB
GPOS
GNEG
–40.00dB
–51.07dB
–8.93dB
INPUT
0dB
VC = 0V
VG1
VG2
VO1 = 0.473V
VO2 = 1.526V
OUTPUT
–20dB
A2
A1
005
39
-03
6
Figure 38. AD603 Gain Control Input Calculations for Sequential Control Operation VC = 0 V
31.07dB
–42.14dB
GPOS
GNEG
31.07dB
0dB
GPOS
GNEG
0dB
–11.07dB
31.07dB
INPUT
0dB
VC = 1.0V
VG1
VG2
VO1 = 0.473V
VO2 = 1.526V
OUTPUT
20dB
00
53
9-
0
37
Figure 39. AD603 Gain Control Calculations for Sequential Control Operation VC = 1.0 V
31.07dB
–2.14dB
GPOS
GNEG
31.07dB
0dB
GPOS
GNEG
0dB
–28.93dB
31.07dB
INPUT
0dB
VC = 2.0V
VG1
VG2
VO1 = 0.473V
VO2 = 1.526V
OUTPUT
60dB
00
53
9-
03
8
Figure 40. AD603 Gain Control Input Calculations for Sequential Operation VC = 2.0 V
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