參數(shù)資料
型號: AD5780BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 13/28頁
文件大?。?/td> 0K
描述: IC DAC VOLT OUT 18BIT 24LFCSP
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 2.5µs
位數(shù): 18
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ EP(4x5)
包裝: 托盤
輸出數(shù)目和類型: 1 電壓,雙極
AD5780
Data Sheet
Rev. E | Page 20 of 28
Table 8. Hardware Control Pins Truth Table
LDAC
CLR
RESET
Function
0
The AD5780 is in reset mode. The device cannot be programmed.
The AD5780 is returned to its power-on state. All registers are set to their default values.
0
1
The DAC register is loaded with the clearcode register value, and the output is set accordingly.
0
1
The output is set according to the DAC register value.
1
0
1
The DAC register is loaded with the clearcode register value, and the output is set accordingly.
1
The output is set according to the DAC register value.
0
1
The output remains at the clearcode register value.
1
The output remains set according to the DAC register value.
0
1
The output remains at the clearcode register value.
1
The DAC register is loaded with the clearcode register value and the output is set accordingly.
0
1
The DAC register is loaded with the clearcode register value and the output is set accordingly.
1
The output remains at the clearcode register value.
0
1
The output is set according to the DAC register value.
1
X is don’t care.
Table 9. DAC Register
MSB
LSB
DB23
DB22
DB21
DB20
DB19 to DB2
DB1
DB0
R/W
Register address
DAC register data
R/W
0
1
18 bits of data
1
X is don’t care.
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