參數資料
型號: AD5551BR
廠商: Analog Devices Inc
文件頁數: 5/16頁
文件大小: 0K
描述: IC DAC 14BIT SERIAL-IN 8-SOIC
產品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
設置時間: 1µs
位數: 14
數據接口: 串行
轉換器數目: 1
電壓電源: 單電源
功率耗散(最大): 6.05mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOIC
包裝: 管件
輸出數目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 1M
AD5551/AD5552
Rev. A | Page 13 of 16
REFERENCE AND GROUND
As the input impedance is code-dependent, the reference pin
should be driven from a low-impedance source. The AD5551/
AD5552 operate with a voltage reference ranging from 2 V to
VDD. Although DAC’s full-scale output voltage is determined by
the reference, references below 2 V results in reduced accuracy.
Table 6 and Table 7 outline the analog output voltage for
particular digital codes. For optimum performance, Kelvin
sense connections are provided on the AD5552.
If the application does not require separate force and sense
lines, they should be tied together close to the package to
minimize voltage drops between the package leads and the
internal die. ADR291 and ADR293 are suitable references
for this product.
POWER-ON RESET
These parts have a power-on reset function to ensure the output
is at a known state upon power-up. After power-up, the DAC
register contains all zeros, until data is loaded from the serial
register. However, the serial register is not cleared on power-up,
so its contents are undefined. When loading data initially to the
DAC, 14 bits or more should be loaded to prevent erroneous
data appearing on the output. If more than 14 bits are loaded,
only the last 14 are kept, and if fewer than 14 are loaded, bits
remain from the previous word. If the AD5551/AD5552 needs
to be interfaced with data shorter than 14 bits, the data should
be padded with zeros at the LSBs.
POWER SUPPLY AND REFERENCE BYPASSING
For accurate high-resolution performance, it is recommended
that the reference and supply pins be bypassed with a 10 μF
tantalum capacitor in parallel with a 0.1 μF ceramic capacitor.
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