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參數(shù)資料
| 型號： | AD5441BRMZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/17頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT SERIAL IN 8MSOP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1,000 |
| 設置時間： | 500ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 55µW |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電流，單極；1 電流，雙極 |
| 采樣率（每秒）： | 5M |
| 配用： | EVAL-AD5541/42EBZ-ND - BOARD EVAL FOR AD5441/2 |
AD5441
Rev. A | Page 10 of 16
TERMINOLOGY
Relative Accuracy (INL)
Relative accuracy or endpoint nonlinearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
adjusting for zero and full scale and is normally expressed in
LSBs or as a percentage of the full-scale reading.
Differential Nonlinearity (DNL)
DNL is the difference between the measured change and the
ideal 1 LSB change between any two adjacent codes. A specified
differential nonlinearity of 1 LSB maximum over the operating
temperature range ensures monotonicity.
Gain Error
Gain error or full-scale error is a measure of the output error
between an ideal DAC and the actual device output. For these
DACs, ideal maximum output is VREF 1 LSB. Gain error of the
DACs is adjustable to zero with external resistance.
Zero Scale Error
Calculated from worst-case RREF
IZSE(LSB) = (RREF × ILKG × 4096)/VREF.
Output Leakage Current
Output leakage current is the current that flows into the DAC
ladder switches when they are turned off. For the IOUT terminal,
it can be measured by loading all 0s to the DAC and measuring
the IOUT current.
Output Capacitance
Capacitance from IOUT1 to AGND.
Digital-to-Analog Glitch Impulse
The amount of charge injected from the digital inputs to the
analog output when the inputs change state. This is normally
specified as the area of the glitch in either pA-s or nV-s,
depending on whether the glitch is measured as a current or
voltage signal.
Digital Feedthrough
When the device is not selected, high frequency logic activity
on the digital inputs of the device may be capacitively coupled
through the device and produce noise on the IOUT pins. This
noise is coupled from the outputs of the device onto follow-on
circuitry. This noise is digital feedthrough.
Multiplying Feedthrough Error
This is the error due to capacitive feedthrough from the DAC
reference input to the DAC IOUT1 terminal when all 0s are
loaded to the DAC.
Total Harmonic Distortion (THD)
The DAC is driven by an ac reference. The ratio of the rms sum
of the harmonics of the DAC output to the fundamental value is
the THD. Usually only the lower order harmonics, such as
second to fifth, are included.
V1
V5
V4
V3
V2
THD
2
log
20
+
=
Compliance Voltage Range
The maximum range of (output) terminal voltage for which the
device provides the specified characteristics.
Output Noise Spectral Density
Calculation from
en = √4KTRB
where:
K is Boltzmann Constant (J/°K).
R is resistance (Ω).
T is the resistor temperature (°K).
B is the 1 Hz bandwidth.
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相關代理商/技術參數(shù) |
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| AD5442ABCPZ-1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.7 V to 5.5 V, Serial-Input, Voltage-Output, 16-/12-Bit nanoDACs in LFCSP |
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| AD5443 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface |
| AD5443BRM | 制造商:Analog Devices 功能描述:DAC SGL R-2R 12-BIT 10PIN USOIC - Bulk |
| AD5443-DBRD | 制造商:Analog Devices 功能描述: |
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