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參數(shù)資料
| 型號： | AD5420AREZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT 1CH SER 24TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 設(shè)計資源： | Simplified 16-Bit, 4 mA-to-20 mA Output Solution Using AD5420 (CN0098) |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時間： | 10µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 950mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm）裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電流，單極 |
| 采樣率（每秒）： | * |
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AD5410/AD5420
Data Sheet
Rev. F | Page 16 of 32
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy, or integral nonlinearity (INL), is
a measure of the maximum deviation, in % FSR, from a straight
line passing through the endpoints of the DAC transfer
function. A typical INL vs. code plot is shown in Figure 7.
Differential Nonlinearity (DNL)
Differential nonlinearity (DNL) is the difference between the
measured change and the ideal 1 LSB change between any two
adjacent codes. A specified differential nonlinearity of ±1 LSB
maximum ensures monotonicity. This DAC is guaranteed
monotonic by design. A typical DNL vs. code plot can be seen
Total Unadjusted Error (TUE)
Total unadjusted error (TUE) is a measure of the output error
taking all the various errors into account, namely INL error,
offset error, gain error, and output drift over supplies and
temperature. TUE is expressed in % FSR. A typical TUE vs.
code plot can be seen in Figure 9.
Monotonicity
A DAC is monotonic if the output either increases or remains
constant for increasing digital input code. The AD5410/AD5420
are monotonic over their full operating temperature range.
Full-Scale Error
Full-scale error is a measure of the output error when full-scale
code is loaded to the data register. Ideally, the output should be
full-scale 1 LSB. Full-scale error is expressed as a percentage
of the full-scale range (% FSR).
Full-Scale Error Temperature Coefficient (TC)
This is a measure of the change in full-scale error with changes
in temperature. Full-scale error TC is expressed in ppm FSR/°C.
Gain Error
This is a measure of the span error of the DAC. It is the devia-
tion in slope of the DAC transfer characteristic from the ideal
expressed in % FSR. A plot of gain error vs. temperature can be
seen in Figure 15.
Gain Error Temperature Coefficient (TC)
This is a measure of the change in gain error with changes in
temperature. Gain error TC is expressed in ppm FSR/°C.
Current Loop Compliance Voltage
This is the maximum voltage at the IOUT pin for which the
output current is equal to the programmed value.
Power Supply Rejection Ratio (PSRR)
PSRR indicates how the output of the DAC is affected by
changes in the power supply voltage.
Voltage Reference Temperature Coefficient (TC)
Voltage reference TC is a measure of the change in the reference
output voltage with a change in temperature. The voltage
reference TC is calculated using the box method, which defines
the TC as the maximum change in the reference output over a
given temperature range, expressed in ppm/°C as follows:
6
10
×
×
=
TempRange
V
TC
REFnom
REFmin
REFmax
where:
VREFmax is the maximum reference output measured over the
total temperature range.
VREFmin is the minimum reference output measured over the total
temperature range.
VREFnom is the nominal reference output voltage, 5 V.
TempRange is the specified temperature range, 40°C to +85°C.
Reference Load Regulation
Load regulation is the change in reference output voltage due to
a specified change in load current. It is expressed in ppm/mA.
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