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參數(shù)資料
| 型號： | AD5382BSTZ-5 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 26/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 32CH 5V 100-LQFP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | Redesign Change 28/Oct/2011 |
| 設(shè)計資源： | 32 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5382 (CN0011) AD5382 Channel Monitor Function (CN0012) |
| 標準包裝： | 1 |
| 設(shè)置時間： | 8µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 32 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 65mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 32 電壓，單極 |
| 采樣率（每秒）： | 125k |
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AD5382
Data Sheet
Rev. C | Page 32 of 40
AD5382 to PIC16C6x/7x
The PIC16C6x/7x synchronous serial port (SSP) is configured as
an SPI master with the Clock Polarity bit = 0. This is done by
writing to the synchronous serial port control register (SSPCON).
See the PIC16/17 Microcontroller User Manual. In this example
I/O, Port RA1 is being used to pulse SYNC and enable the serial
port of the AD5382. This microcontroller transfers only eight
bits of data during each serial transfer operation; therefore, three
consecutive read/write operations may be needed depending on
the mode. Figure 35 shows the connection diagram.
03733-036
PIC16C6X/7X1
AD53821
SDI/RC4
SDO/RC5
SCK/RC3
RA1
SDO
RESET
SER/PAR
DIN
SCLK
SYNC
SPI/I2C
DVDD
1ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 35. AD5382-to-PIC16C6x/7x Interface
AD5382 to 8051
The AD5382 requires a clock synchronized to the serial data.
The 8051 serial interface must therefore be operated in Mode 0.
In this mode, serial data enters and exits through RxD, and a
shift clock is output on TxD. Figure 36 shows how the 8051 is
connected to the AD5382. Because the AD5382 shifts data out
on the rising edge of the shift clock and latches data in on the
falling edge, the shift clock must be inverted. The AD5382
requires its data to be MSB first. Since the 8051 outputs the
LSB first, the transmit routine must take this into account.
03733-037
8XC511
AD53821
RxD
TxD
P1.1
SDO
RESET
SER/PAR
DIN
SCLK
SYNC
SPI/I2C
DVDD
1ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 36. AD5382-to-8051 Interface
AD5382 to ADSP-2101/ADSP-2103
Figure 37 shows a serial interface between the AD5382 and the
ADSP-2101/ADSP-2103. The ADSP-2101/ADSP-2103 should
be set up to operate in SPORT transmit alternate framing mode.
The ADSP-2101/ADSP-2103 SPORT is programmed through
the SPORT control register and should be configured as follows:
internal clock operation, active low framing, and 16-bit word
length. Transmission is initiated by writing a word to the
Tx register after the SPORT has been enabled.
03733-038
ADSP-2101/
ADSP-21031
AD53821
DR
DT
SCK
TFS
RFS
SDO
RESET
SER/PAR
DIN
SCLK
DVDD
SPI/I2C
SYNC
1ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 37. AD5382-to-ADSP-2101/ADSP-2103 Interface
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| AD5383BST | 制造商:Analog Devices 功能描述:- Bulk |
| AD5383BST-3 | 制造商:Rochester Electronics LLC 功能描述:32/40-CHANNEL 3V/5V SINGLE SUPPLY 12/14-BIT VOUT DAC - Bulk 制造商:Analog Devices 功能描述: |
| AD5383BST-5 | 制造商:Analog Devices 功能描述:DAC 32-CH Resistor-String 12-bit 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:32-CHN 5V SINGLE SUPPLY 12-BIT VOUT I.C. - Bulk |
| AD5383BST-5-REEL | 制造商:Analog Devices 功能描述:DAC 32-CH Resistor-String 12-bit 100-Pin LQFP T/R |
| AD5383BSTZ-3 | 功能描述:IC DAC 12BIT 32CHAN 3V 100LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
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