參數(shù)資料
型號: AD5380
廠商: Analog Devices, Inc.
英文描述: 40-Channel, 3V/5V Single Supply, 14-Bit, Voltage-Output DAC
中文描述: 40通道,3V/5V單電源,14位,電壓輸出DAC
文件頁數(shù): 1/34頁
文件大?。?/td> 975K
代理商: AD5380
Preliminary Technical Data
PRELIMINARY TECHNICAL DATA
REV. PrF 09/2003
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD5380
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2003
14
DAC
REG
0
VOUT 0
LDAC
CLR
WR/(DCEN/AD1)
FIFO EN
BUSY
INTERFACE
CONTROL
LOGIC
AVDD (X5)
DVDD (X3)
DGND (X3)
+
14
INPUT
REG
0
14
14
m REG0
c REG0
14
14
AGND (X5)
+
INPUT
REG
6
14
14
m REG6
14
14
14
X
+
-
c REG6
14
DAC 6
DAC
REG
6
VOUT 5
+
INPUT
REG
7
14
14
14
m REG7
c REG7
14
VOUT 1
VOUT 4
14
DAC
REG
7
14
VOUT 7
VOUT 8
VOUT 38
VOUT 2
VOUT 3
AD5380
X5
X
X
VOUT 6
DAC 0
DAC 7
+
INPUT
REG
1
14
.
.
.
.
.
14
m REG1
14
14
14
X
c REG1
.
.
.
.
14
DAC 1
DAC
REG
1
.
.
.
.
.
.
.
.
+
-
+
-
+
-
.
.
.
POWER-ON
RESET
FIFO
+
STATE
MACHINE
+
CONTROL
LOGIC
RESET
DB0
.
DDB13 /(DIN/SDA)
DB11 /(SDB10
A0
A5
CS/(SYNC/AD0)
REG0
REG1
SER/PAR
2.5V
Reference
REFOUT/ REFIN
PD
R
R
R
R
R
R
R
R
SIGNAL GND (X5)
REFGND
DAC GND (X5)
SDO(A/B)
39 -TO-1
MUX
VOUT 0 .......... VOUT 38
VOUT 39 / MON_OUT
40-Channel, 3V/5V Single Supply,
14-Bit, Voltage-Output DAC
FEATURES
Guaranteed Monotonic
INL Error: ±4LSB max
On-Chip 1.25/2.5V, 10ppm/°C Reference
Temperature Range: -40°C to +85°C
Rail to Rail Output Amplifier
Package Type: 100-lead LQFP (14mm x 14mm)
User Interfaces:
Parallel,
Serial (SPI, QSPI, Microwire and DSP compatible
featuring Data Readback)
I2C Compatible Interface
INTEGRATED FUNCTIONS
Channel Monitor
Simultaneous Output Update via
Clear Function to User Programmable Code
Amplifier Boost Mode to Optimize Slew Rate
User Programmable Offset and Gain Adjust
Toggle Mode: Enables Squarewave Generation
LDAC
APPLICATIONS
Variable Optical Attenuators (VOA)
Level Setting
Optical Microelectromechanical Systems (MEMs)
Control Systems
GENERAL DESCRIPTION
The AD5380 is a complete single supply, 40-channel, 14-
bit DAC available in 100-lead LQFP package. All
40-channels have an on-chip output amplifier with rail-to-
rail operation. The AD5380 includes an internal 1.25/
2.5V, 10ppm/°C reference, an on-chip channel monitor
function that multiplexes the analog outputs to a common
MON_OUT pin for external monitoring and an output
amplifier boost mode that allows the amplifier settling
time to be optimized. The AD5380 contains a double
buffered parallel interface featuring a
WR
pulse width of
20ns, a serial interface compatible with SPI
TM
, QSPI
TM
,
MICROWIRE
TM
and DSP interface standards with
interface speeds in excess of 30MHz and an I2C
compatible interface supporting 400kHz data transfer rate.
An input register followed by a DAC register provides
double buffering allowing the DAC outputs to be updated
independantly or simultaneously using the
LDAC
input.
Each channel has a programmable gain and offset adjust
register allowing the user to fully calibrate any DAC Channel.
Power consumption is typically 0.3mA/channel.
*Protected by U.S. Patent Nos. 5,969,657; other patents pending.
SPI
and
QSPI
are Trademarks of Motorola, Inc.
MICROWIRE
is a Trademark of National Semiconductor Corporation.
FUNCTIONAL BLOCK DIAGRAM
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