參數(shù)資料
型號: AD5378ABC
廠商: Analog Devices Inc
文件頁數(shù): 20/29頁
文件大小: 0K
描述: IC DAC 14BIT 32CHAN 108CSPBGA
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
設(shè)置時間: 20µs
位數(shù): 14
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 32
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 850mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 108-BGA,CSPBGA
供應(yīng)商設(shè)備封裝: 108-CSPBGA(13x13)
包裝: 托盤
輸出數(shù)目和類型: 32 電壓,雙極
采樣率(每秒): 50k
AD5378
Rev. A | Page 26 of 28
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5378 is mounted should be designed so that the
analog and digital sections are separated and confined to
certain areas of the board. If the AD5378 is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the device.
For supplies with multiple pins (VSS, VDD, VCC), it is recom-
mended to tie these pins together and to decouple each
supply once.
The AD5378 should have ample supply decoupling of 10 μF in
parallel with 0.1 μF on each supply located as close to the
package as possible, ideally right up against the device. The
10 μF capacitors are the tantalum bead type. The 0.1 μF capaci-
tor should have low effective series resistance (ESR) and
effective series inductance (ESI), such as the common ceramic
types that provide a low impedance path to ground at high
frequencies, to handle transient currents due to internal
logic switching.
Digital lines running under the device should be avoided,
because these couple noise onto the device. The analog ground
plane should be allowed to run under the AD5378 to avoid
noise coupling. The power supply lines of the AD5378 should
use as large a trace as possible to provide low impedance paths
and reduce the effects of glitches on the power supply line. Fast
switching digital signals should be shielded with digital ground
to avoid radiating noise to other parts of the board, and should
never be run near the reference inputs. It is essential to mini-
mize noise on all VREF(+) and VREF() lines. The VBIAS pin should
be decoupled with a 10 nF capacitor to AGND.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough through the
board. A microstrip technique is by far the best, but not always
possible with a double-sided board. In this technique, the
component side of the board is dedicated to ground plane,
while signal traces are placed on the solder side.
As for all thin packages, care must be taken to avoid flexing the
CSPBGA package and to avoid a point load on the surface of
this package during the assembly process.
POWER-ON
An on-chip power supply monitor makes the AD5378 robust to
power sequencing. The supply monitor powers up the analog
section after (VDD VSS) is greater than 7 V (typical). The
output buffers power up in CLR mode forced to the DUTGND
potential, even if VCC remains at 0 V. After VSS is applied, the
analog circuitry powers up and the buffered DAC output level
settles linearly within the supply range.
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