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| 型號： | AD5378ABC |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 32CHAN 108CSPBGA |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 20µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 32 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 功率耗散（最大）： | 850mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 108-BGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 108-CSPBGA（13x13） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 32 電壓，雙極 |
| 采樣率（每秒）： | 50k |
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AD5378
Rev. A | Page 18 of 28
FUNCTIONAL DESCRIPTION
DAC ARCHITECTURE—GENERAL
The AD5378 contains 32 DAC channels and 32 output amplifiers
in a single package. The architecture of a single DAC channel
consists of a 14-bit resistor-string DAC followed by an output
buffer amplifier. The resistor-string section is simply a string of
resistors, each of value R, from VREF(+) to AGND. This type of
architecture guarantees DAC monotonicity. The 14-bit binary
digital code loaded to the DAC register determines at which
node on the string the voltage is tapped off before being fed into
the output amplifier. The output amplifier translates the output
of the DAC to a wider range. The DAC output is gained up by a
factor of 3.5 and offset by the voltage on the VREF() pin. See the
Transfer Function section.
CHANNEL GROUPS
The 32 DAC channels on the AD5378 are arranged into four
groups (A, B, C, D) of eight channels. In each group, six
channels are connected to VREF1(+) and VREF1(); the remaining
two channels are connected to VREF2(+) and VREF2(). Each
group has two individual REFGND pins. For example, in
Group A, six channels are connected to REFGNDA1, and the
remaining two channels are connected to REFGNDA2. In
addition to an input register (x1) and a DAC register (x2), each
channel has a gain register (m) and an offset register (c). See
Table 18. Including these registers allows the user to calibrate
out errors in the complete signal chain, including the DAC
errors.
Table 10 shows the reference and REFGND inputs, and the
m and c registers for Group A. Groups B, C, and D are similar.
Table 10. Inputs and Registers for Group A
Channel
Reference
REFGND
m, c Registers
0…5
VREF1(+), VREF1()
REFGNDA1
m REG0…5
c REG0…5
6…7
VREF2(+), VREF2()
REFGNDA2
m REG6…7
c REG6…7
TRANSFER FUNCTION
The digital input transfer function for each DAC can be
represented as
x2 = [(m + 1)/213 × x1] + (c 2n1)
where:
x2 is the data-word loaded to the resistor string DAC.
The default is 10 0000 0000 0000.
x1 is the 14-bit data-word written to the DAC input register.
The default is 10 0000 0000 0000.
m is the 13-bit gain coefficient. The default is 1 1111 1111 1111.
c is the 14-bit offset coefficient. The default is 10 0000 0000 0000.
n is the DAC resolution. n = 14.
Figure 19 shows a single DAC channel and its associated
registers. The power-on values for the m and c registers are full
scale and 0x2000, respectively. The user can individually adjust
the voltage range on each DAC channel by overwriting the
power-on values of m and c. The AD5378 has digital overflow
and underflow detection circuitry to clamp the DAC output at
full scale or at zero scale when the values chosen for x1, m, and
c result in x2 being out of range.
DAC
x2
VREF(+)
AGND
x2
REG
x1 INPUT
REG
DAC
m REG
c REG
INPUT
DATA
VDAC
DAC
REG
LDAC
05292-019
Figure 19. Single DAC Channel
The complete transfer function for the AD5378 can be
represented as
VOUT = 3.5 × ((VREF(+) AGND) × x2/214) +
2.5 × (VREF() AGND) + REFGND
where:
x2 is the data-word loaded to the resistor string DAC.
VREF(+) is the voltage at the positive reference pin.
VREF() is the voltage at the negative reference pin.
Figure 20 shows the output amplifier stage of a single channel.
VDAC is the voltage output from the resistor string DAC. The
nominal range of VDAC is 1 LSB to full scale.
VDAC
R
2.5R
VOUT
VREF(–)
REFGND
AGND
05292-020
Figure 20. Output Amplifier Stage
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| AD5378ABCZ | 功能描述:IC DAC 14BIT 32CHAN 108CSPBGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD5378ABCZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel, 14-Bit, Parallel and Serial Input, Bipolar Voltage Output DAC |
| AD5379 | 制造商:AD 制造商全稱:Analog Devices 功能描述:40-Channel, 14-Bit, Parallel and Serial Input, Bipolar Voltage-Output DAC |
| AD5379ABC | 功能描述:IC DAC 14BIT 40CH 108-CSPBGA RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD5379ABCZ | 功能描述:IC DAC 14BIT 40CHAN 108CSPBGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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