參數(shù)資料
型號(hào)： AD5348BCP-REEL7
廠商： ANALOG DEVICES INC
元件分類(lèi)： DAC
英文描述： Dual 14-bit 80MSPS ADC with serialized LVDS output 48-VQFN -40 to 85
中文描述： PARALLEL, WORD INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, QCC40
封裝： 6 X 6 MM, MO-220-VJJD-2, LFCSP-40
文件頁(yè)數(shù)： 16/24頁(yè)
文件大?。?/td> 949K
代理商： AD5348BCP-REEL7
AD5346/AD5347/AD5348
FUNCTIONAL DESCRIPTION
The AD5346/AD5347/AD5348 are octal resistor-string DACs
fabricated by a CMOS process with resolutions of 8, 10, and 12
bits, respectively. They are written to using a parallel interface.
They operate from single supplies of 2.5 V to 5.5 V, and the
output buffer amplifiers offer rail-to-rail output swing. The gain
of the buffer amplifiers can be set to 1 or 2 to give an output
voltage range of 0 V to V
REF
or 0 V to 2 × V
REF.
The AD5346/
AD5347/AD5348 have reference inputs that may be buffered to
draw virtually no current from the reference source. The devices
have a power-down feature that reduces current consumption
to only 100 nA @ 3 V.
Rev. 0 | Page 16 of 24
DIGITAL-TO-ANALOG SECTION
The architecture of one DAC channel consists of a reference
buffer and a resistor-string DAC followed by an output buffer
amplifier. The voltage at the V
REF
pin provides the reference
voltage for the DAC. Figure 37 shows a block diagram of the
DAC architecture. Because the input coding to the DAC is
straight binary, the ideal output voltage is given by
Gain
D
N
2
V
V
REF
OUT
×
×
=
where:
D
is the decimal equivalent of the binary code, which is loaded
to the DAC register:
0–255 for AD5346 (8 bits)
0–1023 for AD5347 (10 bits)
0–4095 for AD5348 (12 bits)
N
is the DAC resolution.
Gain
is the output amplifier gain (1 or 2).
V
OUT
A
(GAIN = +1 OR +2)
V
REF
AB
BUF
DAC
REGISTER
INPUT
REGISTER
RESISTOR
STRING
OUTPUT
BUFFER AMPLIFIER
REFERENCE
BUFFER
0
Figure 37. Single DAC Channel Architecture
RESISTOR STRING
The resistor string section is shown in Figure 38. It is simply a
string of resistors, each of value R. The digital code loaded to
the DAC register determines at what node on the string the
voltage is tapped off to be fed into the output amplifier. The
voltage is tapped off by closing one of the switches connecting
the string to the amplifier. Because it is a string of resistors, it is
guaranteed monotonic.
TO OUTPUT
AMPLIFIER
R
R
R
R
R
V
REF
0
Figure 38. Resistor String
DAC REFERENCE INPUT
The DACs operate with an external reference. The AD5346/
AD5347/AD5348 have a reference input for each pair of DACs.
The reference inputs may be configured as buffered or
unbuffered. This option is controlled by the BUF pin.
In buffered mode (BUF = 1), the current drawn from an
external reference voltage is virtually zero because the imped-
ance is at least 10 M. The reference input range is 1 V to V
DD
.
In unbuffered mode (BUF = 0), the user can have a reference
voltage as low as 0.25 V and as high as V
DD
because there is no
restriction due to headroom and footroom of the reference
amplifier. The impedance is still large at typically 90 k for 0 V
to V
REF
mode and 45 k for 0 V to 2 × V
REF
mode.
If using an external buffered reference (such as REF192), there
is no need to use the on-chip buffer.
OUTPUT AMPLIFIER
The output buffer amplifier is capable of generating output
voltages to within 1 mV of either rail. Its actual range depends
on V
REF
, GAIN, the load on V
OUT
, and offset error.
If a gain of +1 is selected (GAIN = 0), the output range is
0.001 V to V
REF
.
If a gain of +2 is selected (GAIN = +1), the output range is
0.001 V to 2 × V
REF
. However, because of clamping, the
maximum output is limited to V
DD
– 0.001 V.
The output amplifier is capable of driving a load of 2 k to
GND or V
DD
, in parallel with 500 pF to GND or V
DD
. The source
and sink capabilities of the output amplifier can be seen in
Figure 24.
The slew rate is 0.7 V/μs with a half-scale settling time to ±0.5 LSB
(at 8 bits) of 6 s with the output unloaded. See Figure 29.
相關(guān)PDF資料
PDF描述
AD5348BRU Dual 14-bit 80MSPS ADC with serialized LVDS output 48-VQFN -40 to 85
AD5348BRU-REEL Dual 14-bit 80MSPS ADC with serialized LVDS output 48-VQFN -40 to 85
AD5348BRU-REEL7 Dual 14-bit 80MSPS ADC with serialized LVDS output 48-VQFN -40 to 85
AD5346BCP-REEL 2.5 V to 5.5 V, Parallel Interface 2.5 V to 5.5 V, Parallel Interface
AD5347BCP-REEL 2.5 V to 5.5 V, Parallel Interface 2.5 V to 5.5 V, Parallel Interface
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