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參數(shù)資料
| 型號： | AD5348BCP-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | Dual 14-bit 80MSPS ADC with serialized LVDS output 48-VQFN -40 to 85 |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, QCC40 |
| 封裝： | 6 X 6 MM, MO-220-VJJD-2, LFCSP-40 |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 949K |
| 代理商： | AD5348BCP-REEL7 |
AD5346/AD5347/AD5348
TERMINOLOGY
Relative Accuracy
For the DAC, relative accuracy or integral nonlinearity (INL) is
a measure of the maximum deviation, in LSBs, from a straight
line passing through the actual endpoints of the DAC transfer
function. Typical INL versus code plots can be seen in Figure 14,
Figure 15, and Figure 16.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between the
measured change and the ideal 1 LSB change between any two
adjacent codes. A specified differential nonlinearity of ± 1 LSB
maximum ensures monotonicity. This DAC is guaranteed
monotonic by design. Typical DNL versus code plots can be
seen in Figure 17, Figure 18, and Figure 19.
Gain Error
This is a measure of the span error of the DAC, including any
error in the gain of the buffer amplifier. It is the deviation in
slope of the actual DAC transfer characteristic from the ideal
and is expressed as a percentage of the full-scale range. This is
illustrated in Figure 11.
Offset Error
This is a measure of the offset error of the DAC and the output
amplifier. It is expressed as a percentage of the full-scale range.
Rev. 0 | Page 10 of 24
If the offset voltage is positive, the output voltage still positive at
zero input code. This is shown in Figure 12. Because the DACs
operate from a single supply, a negative offset cannot appear at
the output of the buffer amplifier. Instead, there is a code close
to zero at which the amplifier output saturates (amplifier
footroom). Below this code there is a dead band over which the
output voltage does not change. This is illustrated in Figure 13.
OUTPUT
VOLTAGE
DAC CODE
POSITIVE
GAIN ERROR
NEGATIVE
GAIN ERROR
ACTUAL
IDEAL
0
Figure 11. Gain Error
OUTPUT
VOLTAGE
DAC CODE
POSITIVE
OFFSET
GAIN ERROR
AND
OFFSET
ERROR
ACTUAL
IDEAL
0
Figure 12. Positive Offset Error and Gain Error
AMPLIFIER
FOOTROOM
(~1mV)
NEGATIVE
OFFSET
OUTPUT
VOLTAGE
DAC CODE
GAIN ERROR
AND
OFFSET
ERROR
DEADBAND CODES
ACTUAL
IDEAL
NEGATIVE
OFFSET
0
Figure 13. Negative Offset Error and Gain Error
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| AD5348BRU | Dual 14-bit 80MSPS ADC with serialized LVDS output 48-VQFN -40 to 85 |
| AD5348BRU-REEL | Dual 14-bit 80MSPS ADC with serialized LVDS output 48-VQFN -40 to 85 |
| AD5348BRU-REEL7 | Dual 14-bit 80MSPS ADC with serialized LVDS output 48-VQFN -40 to 85 |
| AD5346BCP-REEL | 2.5 V to 5.5 V, Parallel Interface 2.5 V to 5.5 V, Parallel Interface |
| AD5347BCP-REEL | 2.5 V to 5.5 V, Parallel Interface 2.5 V to 5.5 V, Parallel Interface |
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