
AD5302/AD5312/AD5322
Rev. D | Page 11 of 24
0.75
0.25
0
–0.75
–1.00
2345
00
92
8-
0
12
E
R
RO
R
(
L
S
B)
VREF(V)
–0.50
0.50
MAX INL
MAX DNL
MIN DNL
MIN INL
TA = 25°C
VDD = 5V
–0.25
1.00
Figure 12. AD5302 INL and DNL Error vs. VREF
0.75
0.25
0
–0.75
–1.00
0
40
80
120
00
92
8-
0
13
E
RRO
R
(
L
S
B)
TEMPERATURE(°C)
–0.50
0.50
–0.25
1.00
MAX DNL
VDD = 5V
VREF = 3V
–40
MIN DNL
MIN INL
MAX INL
Figure 13. AD5302 INL Error and DNL Error vs. Temperature
0.5
0
–1.0
0
40
80
120
00
92
8-
0
14
E
R
RO
R
(
%
)
TEMPERATURE(°C)
–0.5
1.0
–40
VDD = 5V
VREF =2V
GAIN ERROR
OFFSET ERROR
Figure 14. Offset Error and Gain Error vs. Temperature
0
100
150
200
250
300
350
400
00
92
8-
0
15
F
RE
Q
UE
NCY
IDD (A)
VDD = 5V
VDD = 3V
Figure 15. IDD Histogram with VDD = 3 V and VDD = 5 V
4
1
–0
01
23
45
00
92
8-
01
6
V
OU
T
(V
)
SINK/SOURCE CURRENT(mA)
2
3
5
6
3V SOURCE
5V SOURCE
5V SINK
3V SINK
Figure 16. Source and Sink Current Capability
400
300
100
0
ZERO SCALE
FULL SCALE
00
92
8-
0
17
I DD
(A
)
200
500
TA = 25°C
VDD = 5V
Figure 17. Supply Current vs. Code