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參數(shù)資料
| 型號： | AD5301BRTZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/24頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT 2WIRE I2C SOT23-6 |
| 產品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 3,000 |
| 設置時間： | 6µs |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 1.4mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應商設備封裝： | SOT-23-6 |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 167k |
AD5301/AD5311/AD5321
Rev. B | Page 3 of 24
SPECIFICATIONS
VDD = 2.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted.
Table 1.
B Version1
Parameter2
Min
Typ
Max
Unit
Conditions/Comments
DC PERFORMANCE3, 4
AD5301
Resolution
8
Bits
Relative Accuracy
±0.15
±1
LSB
Differential Nonlinearity
±0.02
±0.25
LSB
Guaranteed monotonic by design over all codes.
AD5311
Resolution
10
Bits
Relative Accuracy
±0.5
±4
LSB
Differential Nonlinearity
±0.05
±0.5
LSB
Guaranteed monotonic by design over all codes.
AD5321
Resolution
12
Bits
Relative Accuracy
±2
±16
LSB
Differential Nonlinearity
±0.3
±0.8
LSB
Guaranteed monotonic by design over all codes.
Zero-Code Error
5
20
mV
All zeros loaded to DAC, see Figure 12.
Full-Scale Error
±0.15
±1.25
% of FSR
All ones loaded to DAC, see Figure 12.
Gain Error
±0.15
±1
% of FSR
Zero-Code Error Drift5
–20
μV/°C
Gain Error Drift5
5
ppm of FSR/°C
OUTPUT CHARACTERISTICS5
Minimum Output Voltage
0.001
V
Maximum Output Voltage
VDD 0.001
V
This is a measure of the minimum and maximum
drive capability of the output amplifier.
DC Output Impedance
1
Ω
Short-Circuit Current
50
mA
VDD = 5 V.
20
mA
VDD = 3 V.
Power-Up Time
2.5
μs
Coming out of power-down mode. VDD = 5 V.
6
μs
Coming out of power-down mode. VDD = 3 V.
LOGIC INPUTS (A0, A1, PD)5
Input Current
±1
μA
Input Low Voltage, VIL
0.8
V
VDD = 5 V ± 10%.
0.6
V
VDD = 3 V ± 10%.
0.5
V
VDD = 2.5 V.
Input High Voltage, VIH
2.4
V
VDD = 5 V ± 10%.
2.1
V
VDD = 3 V ± 10%.
2.0
V
VDD = 2.5 V.
Pin Capacitance
3
pF
LOGIC INPUTS (SCL, SDA)5
Input High Voltage, VIH
0.7 × VDD
VDD + 0.3
V
Input Low Voltage, VIL
0.3
+0.3 × VDD
V
Input Leakage Current, IIN
±1
μA
VIN = 0 V to VDD.
Input Hysteresis, VHYST
0.05 × VDD
V
Input Capacitance, CIN
6
pF
Glitch Rejection6
50
ns
Pulse width of spike suppressed.
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| AD5301BRTZ-REEL71 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.5 V to 5.5 V, 120 ??A, 2-Wire Interface, Voltage-Output 8-/10-/12-Bit DACs |
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