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| 型號： | AD5273BRJZ50-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DGTL 50K 64POS SOT23 |
| 標準包裝： | 1 |
| 接片： | 64 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 |
| 供應商設備封裝： | SOT-23-8 |
| 包裝： | 標準包裝 |
| 其它名稱： | AD5273BRJZ50-REEL7DKR |
AD5273
Rev. H | Page 14 of 24
VARIABLE RESISTANCE AND VOLTAGE FOR
RHEOSTAT MODE
If only the W-to-B or W-to-A terminals are used as variable
resistors, the unused A or B terminal can be opened or shorted
with W. This operation is called rheostat mode (see Figure 33).
03224-032
A
W
B
A
W
B
A
W
B
Figure 33. Rheostat Mode Configuration
The nominal resistance, RAB, of the RDAC has 64 contact points
accessed by the wiper terminal, plus the B terminal contact if
RWB is considered. The 6-bit data in the RDAC latch is decoded
to select one of the 64 settings. Assuming that a 10 kΩ part is
used, the wiper’s first connection starts at Terminal B for Data
Register 0x00. This connection yields a minimum of 60 Ω
resistance between Terminal W and Terminal B because of the
60 Ω wiper contact resistance. The second connection is the
first tap point, which corresponds to 219 Ω (RW = 1 × RAB/63 +
RW) for Data Register 0x01, and so on. Each LSB data value
increase moves the wiper up the resistor ladder until the last
shows a simplified diagram of the equivalent RDAC circuit.
The general equation determining RWB is
()
W
AB
WB
R
D
R
+
×
=
63
(1)
where:
D
is the decimal equivalent of the 6-bit binary code.
RAB
is the end-to-end resistance.
RW
is the wiper resistance contributed by the on resistance of
the internal switch.
Table 4. RWB vs. Codes; RAB = 10 kΩ; Terminal A Opened
D (Dec)
RWB (Ω)
Output State
63
10,060
Full scale (RAB + RW)
32
5139
Midscale
1
219
1 LSB
0
60
Zero scale (wiper contact resistance)
Because a finite wiper resistance of 60 Ω is present in the zero-
scale condition, care should be taken to limit the current flow
between W and B in this state to a maximum pulse current of
20 mA. Otherwise, degradation or possible destruction of the
internal switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between the Wiper W and Terminal A also produces a
complementary resistance, RWA. When these terminals are used,
Terminal B can be opened or shorted to W. Setting the resistance
value for RWA starts at a maximum value of resistance and
decreases as the data loaded in the latch increases in value.
The general equation for this operation is
()
W
AB
WA
R
D
R
+
×
=
63
(2)
Table 5. RWA vs. Codes; RAB =10 kΩ; Terminal B Opened
D (Dec)
RWA (Ω)
Output State
63
60
Full scale
32
4980
Midscale
1
9901
1 LSB
0
10,060
Zero scale
The typical distribution of the resistance tolerance from device
to device is process-lot dependent, and it is possible to have
±30% tolerance.
D5
D4
D3
D2
D1
D0
RDAC
LATCH
AND
DECODER
RS
A
W
B
03224-033
Figure 34. AD5273 Equivalent RDAC Circuit
VARIABLE RESISTANCE AND VOLTAGE FOR
POTENTIOMETER MODE
If all three terminals are used, the operation is called the
potentiometer mode. The most common configuration is
the voltage divider operation (see Figure 35).
A
VI
W
B
VO
03224-034
Figure 35. Potentiometer Mode Configuration
Ignoring the effect of the wiper resistance, the transfer function
is simply
()
A
W
V
D
V
63
=
(3)
A more accurate calculation, which includes the wiper
resistance effect, yields
()
A
W
AB
W
AB
W
V
R
D
V
2
63
+
=
(4)
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