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參數(shù)資料
| 型號： | AD5062BRJZ-2REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT 2.7-5.5V SOT23-8 |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 3,000 |
| 系列： | nanoDAC™ |
| 設置時間： | 4µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 3.5mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 |
| 供應商設備封裝： | SOT-23-8 |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 1.3M |
AD5062
Rev. A | Page 3 of 20
SPECIFICATIONS
VDD = 5.5 V, VREF = 4.096 V, RL = Unloaded, CL = 22 pF to GND; TMIN to TMAX, unless otherwise noted.
Table 2.
A,B Grade1
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
16
Bits
Relative Accuracy (INL)2
±0.5
±1
LSB
40°C to +85°C, B grade
±0.5
±2
40°C to +85°C, A grade
Total Unadjusted Error (TUE)
±500
±800
μV
40°C to +85°C, B grade
±500
±800
40°C to +85°C, A grade
Differential Nonlinearity (DNL)
±0.5
±1
LSB
Guaranteed monotonic
40°C to +85°C, B grade
±0.5
±1
Guaranteed monotonic
40°C to +85°C, A grade
Gain Error
±0.01
±0.02
% of FSR
TA = 40°C to +85°C B grade
±0.01
±0.02
TA = 40°C to +85°C A grade
Gain Error Temperature Coefficient
1
ppm of FSR/°C
Offset Error
±0.025
±0. 05
mV
TA = 40°C to + 85°C, B grade
±0.025
±0. 05
TA = 40°C to + 85°C, A grade
Offset Error Temperature Coefficient
0.5
μV/°C
Full-Scale Error
±500
±800
μV
All 1s loaded to DAC register, B grade
TA = 40°C to +85°C
±500
±800
All 1s loaded to DAC register, A grade
TA = 40°C to +85°C
OUTPUT CHARACTERISTICS3
Output Voltage Range
0
VREF
V
Unipolar operation
Output Voltage Settling Time
4
μs
scale to scale code transition to
±1LSB.
Output Noise Spectral Density
24
nV/
√Hz
DAC code = midscale, 1 kHz
Output Voltage Noise
6
μV p-p
DAC code = midscale, 0.1 to 10 Hz
bandwidth
Digital-to-Analog Glitch Impulse
2
nV-s
1 LSB change around major carry
Digital Feedthrough
0.1
nV-s
DC Output Impedance (Normal)
8
kΩ
Output impedance tolerance ±20%
DC Output Impedance (Power-Down)
(Output Connected to 1 kΩ Network)
1
kΩ
Output impedance tolerance ±20%
(Output Connected to 100 kΩ Network)
100
kΩ
Output impedance tolerance ±20%
REFERENCE INPUT/ OUTPUT
2
VDD 50
mV
Input Current (Power-Down)
±0.1
μA
Zero-scale loaded
Input Current (Normal)
±0. 5
μA
DC Input Impedance
1
M
Ω
Bipolar/unipolar operation
LOGIC INPUTS
Input Current4
±1
±2
μA
VIL, Input Low Voltage
0.8
V
VDD = 4.5 V to 5.5 V
0.8
VDD = 2.7 V to 3.6 V
VIH, Input High Voltage
2.0
V
VDD = 2.7 V to 5.5 V
1.8
VDD = 2.7 V to 3.6 V
Pin Capacitance
4
pF
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