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AD1981BL
RECORD SELECT CONTROL REGISTER
Index 0x1A
Rev. A | Page 19 of 32
Reg No.
0x1A
Used to select the record source independently for right and left. The default value is 0x0000, which corresponds to MIC In. Refer to Table 24 for examples.
All registers are not shown, and bits containing an X are assumed to be reserved.
Table 23.
Bit
Function
RS [2:0]
Right Record Select
LS [2:0]
Left Record Select
Name
Record Select
D15
X
D14
X
D13
X
D12
X
D11
X
D10
LS2
D9
LS1
D8
LS0
D7
X
D6
X
D5
X
D4
X
D3
X
D2
RS2
D1
RS1
D0
RS0
Default
0x0000
Table 24. Settings for Record Select Control
LS [10:8]
000
001
010
011
100
101
110
111
Left Record Source
MIC
CD_L
Muted
AUX_L
LINE_IN_L
Stereo Mix (L)
Mono Mix
PHONE_IN
RS [2:0]
000
001
010
011
100
101
110
111
Right Record Source
MIC
CD_R
Muted
AUX_R
LINE_IN_R
Stereo Mix (R)
Mono Mix
PHONE_IN
RECORD GAIN REGISTER
Index 0x1C
Reg No.
0x1C
Name
Record Gain
D15
IM
D14
X
D13
X
D12
X
D11
LIM3
D10
LIM2
D9
LIM1
D8
LIM0
D7
RM
1
D6
X
D5
X
D4
X
D3
RIM3
D2
RIM2
D1
RIM1
D0
RIM0
Default
0x8000
1
For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels.
If MSPLT is not set, the RM bit has no effect.
All registers are not shown, and bits containing an X are assumed to be reserved. Refer to Table 24 for examples.
Table 25.
Bit
Mnemonic
Function
RIM [3:0]
Right Input Mixer Gain
Control
RM
Right-Channel Mute
Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel separately from the
IM bit. Otherwise, this bit always reads 0 and has no affect when set to 1.
LIM [3:0]
Left Input Mixer Gain
Control
IM
Input Mute
When this bit is set to 1, both the left and right channels are muted, unless the MSPLT bit in
Register 0x76 is set to 1, in which case this mute bit affects only the left channel.
Each LSB represents 1.5 dB, 0000 = 0 dB, and the gain range is 0 dB to 22.5 dB.
Each LSB represents 1.5 dB, 0000 = 0 dB, and the gain range is 0 dB to 22.5 dB.