- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375230 > AD1970JSTZ (ANALOG DEVICES INC) Digital BTSC Encoder with Integrated ADC and DAC PDF資料下載
參數(shù)資料
| 型號： | AD1970JSTZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Digital BTSC Encoder with Integrated ADC and DAC |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | LEAD FREE, PLASTIC, MS-026-BBC, LQFP-48 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 278K |
| 代理商： | AD1970JSTZ |
AD1970
SIGNAL PROCESSING
BACKGROUND OF BTSC
BTSC is the name of the standard for adding stereo audio capa-
bility to the US television system. It is in many ways similar to
the algorithm used for FM stereo broadcasts, with the addition
of a sophisticated compressor circuit to improve the signal-to-
noise ratio.
Rev. 0 | Page 10 of 20
To maintain compatibility with non-BTSC TV receivers, the
processing of mono (L = R) signals is unchanged from the
original pre-BTSC system. The L + R signal is applied to a 75 μs
pre-emphasis filter, and is then applied to a 4.5 MHz FM mod-
ulator, which is later added to the video signal to create a
composite video signal.
Stereo capability is added by taking the L R signal, applying it
to a 2-band dynamic compressor, and then multiplying this
signal by a carrier signal at twice the horizontal scanning rate
(F
h
), or about 2 × 15.734 kHz. This multiplication is known as
double sideband, suppressed-carrier modulation, and it
effectively translates the compressed L R spectrum up in
frequency so that it sits above the audio band (see Figure 3).
For the receiver to recover this L R signal, a pilot tone at the
horizontal rate is added to the signal. The receiver has a PLL
that locks to this pilot and generates a signal at the carrier
frequency. This signal is then used to multiply the composite
BTSC-encoded signal, which translates this component back
down to baseband. Once the L + R and L R signals are
recovered, a simple addition/subtraction circuit (sometimes
referred to as the matrix) can be used to recover the right signal.
Since the pilot tone is added at 15.734 kHz, it is necessary to
reduce the bandwidth of the signal so that audio signals cannot
interfere with the pilot tone. In the AD1970, the bandwidth is
limited to 14 kHz; above this frequency, the response decays
very rapidly.
PERFORMANCE FACTORS
To maintain good separation between the left and right
channels, it is necessary to closely match the filtering and
companding standards set forth in the standard (FCC OET60).
Even small errors can result in poor performance. The AD1970
has been programmed to match these standards as accurately as
possible. Typical separation numbers range from 30 dB at
frequencies below 500 Hz to 15 dB at 13.5 kHz. Measuring these
numbers can be difficult, since significant differences exist
between many units sold as reference decoders, which are all
implemented with analog components.
0
MATRIX
COMPRESSOR
75
μ
s
PRE-EMPH
FILTER
OSCILLATOR
RMS
DETECT
PRE-EMPH
SECOND
ORDER
LPF
EIGHT
ORDER
GAIN
BANDPASS
SECOND
ORDER
GAIN
BANDPASS
FOURTH
ORDER
1/X
RMS
DETECT
NONLINEAR
FORMULA
L-R IN
2
×
Fh CARRIER
Fh PILOT
L–R
L+R
L
R
MAIN
ALGORITHM
FLOW
TO
DAC
SPECTRAL TILT
FILTER
Figure 3. Signal Processing Flow
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD1970JSTZRL | Digital BTSC Encoder with Integrated ADC and DAC |
| AD1981BLJST | AC 97 SoundMAX Codec |
| AD1981BLJST-REEL | AC 97 SoundMAX Codec |
| AD1981BLJSTZ | AC 97 SoundMAX Codec |
| AD1981BLJSTZ-REEL | AC 97 SoundMAX Codec |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1970JSTZRL | 功能描述:IC ENCODER BTSC W/CODEC 48-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| AD1974 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4 ADC with PLL, 192 kHz, 24-Bit Codec |
| AD1974WBSTZ | 制造商:Analog Devices 功能描述: |
| AD1974WBSTZ-RL | 功能描述:ADC, Audio 24 bit 192k I2S 48-LQFP (7x7) 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):有效 類型:ADC，音頻 分辨率（位）:24 b 采樣率（每秒）:192k 數(shù)據(jù)接口:I2S 電壓源:模擬和數(shù)字 電壓 - 電源:3 V ~ 3.6 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商器件封裝:48-LQFP（7x7） 標準包裝:2,000 |
| AD1974YSTZ | 功能描述:IC ADC 4CH W/ON-CHIP PLL 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。