參數(shù)資料
型號(hào)： AD1866RZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 10/12頁(yè)
文件大小： 0K
描述： IC DAC AUDIO 16BIT DUAL 16SOIC
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 47
位數(shù)： 16
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 70mW
工作溫度： -35°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC W
包裝： 管件
輸出數(shù)目和類型： 2 電壓，雙極
采樣率（每秒）： *
+ 5V
+ 5V
FALSE GROUND
(2.5V)
V
O
R
V
O
L
V
O
R
V
O
L
Figure 8a. Schematic Using False Ground
Figure 8a illustrates the traditional approach used to generate
false ground voltages in single supply audio systems. This cir-
cuit requires additional power and circuit board space.
The AD1866 eliminates the need for “false ground” circuitry.
VBR and VBL generate the required bias voltages previously
generated by the “false ground.” As shown in Figure 8b, VBR
and VBL may be used as the reference point in each output
channel. This permits a dc coupled output signal path. This
eliminates ac coupling capacitors and improves low frequency
performance. It should be noted that these bias outputs have
relatively high output impedance and will not drive output cur-
rents larger than 100
A without degrading the specified
performance.
Analog Circuit Considerations–AD1866
REV. 0
–7–
+5V
15
14
13
12
11
10
16
9
1
2
3
4
5
6
8
7
NRL
AGND
NRR
AD1866
LL
DL
CLK
DR
LR
DGND
V
O
L
V
O
R
V
O
R
V
S
V
B
R
V
O
L
V
S
V
L
V
B
L
Figure 8b. Circuitry Using Voltage Biases
DISTORTION PERFORMANCE AND TESTING
The THD+N figure of an audio DAC represents the amount of
undesirable signal produced during reconstruction and play-
back of an audio waveform. Therefore, the THD+N specifica-
tion provides a direct measure to classify and choose an audio
DAC for a desired level of performance. Figure 1 illustrates the
typical THD+N versus frequency performance of the AD1866.
It is evident that the THD+N performance of the AD1866 re-
mains stable at all three amplitude levels through a wide range
of frequencies. A load impedance of at least 2 k
is recom-
mended for best THD+N performance.
Analog Devices tests all AD1866s on the basis of THD+N per-
formance. During the distortion test, a high speed digital pat-
tern generator transmits digital data to each channel of the
device under test. Sixteen-bit data is latched into the DAC at
352.8 kHz (8
× F
S). The test input code is a digitally encoded
990.5 Hz sine wave with 0 dB, –20 dB, and –60 dB amplitudes.
A 4096 point FFT calculates total harmonic distortion + noise,
signal-to-noise ratio, and D-range. No deglitchers or external
adjustments are used.
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