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參數(shù)資料
| 型號(hào)： | AD1839AASZ-REEL1 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | Codec |
| 英文描述： | 2 ADC, 6 DAC, 96 kHz, 24-Bit Sigma-Delta Codec |
| 中文描述： | 2的ADC，6 DAC的，96千赫，24位Σ-Δ編解碼器 |
| 文件頁數(shù)： | 3/24頁 |
| 文件大?。?/td> | 674K |
| 代理商： | AD1839AASZ-REEL1 |
AD1839A
SPECIFICATIONS
TEST CONDITIONS
Supply Voltages
Ambient Temperature
Input Clock
DAC Input Signal
ADC Input Signal
Input Sample Rate (f
S
)
Measurement Bandwidth
Word Width
Load Capacitance
Load Impedance
Performance of all channels is identical (except for the Interchannel Gain Mismatch and Interchannel Phase Deviation specifications).
Table 1.
Parameter
ANALOG-TO-DIGITAL CONVERTERS
ADC Resolution
Dynamic Range (20 Hz to 20 kHz, –60 dB Input)
No Filter
A-Weighted (48 kHz and 96 kHz)
Total Harmonic Distortion + Noise (THD + N)
48 kHz
96 kHz
Interchannel Isolation
Interchannel Gain Mismatch
Analog Inputs
Differential Input Range (±Full Scale)
Common-Mode Input Voltage
Input Impedance
Input Capacitance
V
REF
DC Accuracy
Gain Error
Gain Drift
DIGITAL-TO-ANALOG CONVERTERS
DAC Resolution
Dynamic Range (20 Hz to 20 kHz, –60 dBFS Input)
No Filter
A-Weighted Filter (48 kHz and 96 kHz)
Total Harmonic Distortion + Noise (48 kHz and 96 kHz)
Interchannel Isolation
DC Accuracy
Gain Error
Interchannel Gain Mismatch
Gain Drift
Interchannel Phase Deviation
Volume Control Step Size (1023 Linear Steps)
Volume Control Range (Maximum Attenuation)
Mute Attenuation
De-emphasis Gain Error
Full-Scale Output Voltage at Each Pin (Single-Ended)
Output Resistance at Each Pin
Common-Mode Output Voltage
Rev. B | Page 3 of 24
5.0 V (AVDD, DVDD)
25°C
12.288 MHz (256 × f
S
mode)
1.0078125 kHz, 0 dBFS
1.0078125 kHz,
1 dBFS
48 kHz
0 Hz to 20 kHz
24 bits
100 pF
47 k
Min
100
–2.828
103
105
Typ
24
103
105
–95
–95
100
0.025
2.25
4
15
2.25
±5
35
24
105
108
–92
110
±4
0.025
200
±0.1
0.098
60
–100
±0.1
1.0 (2.8)
180
2.25
Max
–88.5
–87.5
+2.828
–90
Unit
Bits
dB
dB
dB
dB
dB
dB
V
V
k
pF
V
%
ppm/°C
Bits
dB
dB
dB
dB
%
dB
ppm/°C
Degrees
%
dB
dB
dB
V rms (V p-p)
V
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