參數(shù)資料
型號(hào): ACE9030
廠商: Mitel Networks Corporation
英文描述: Radio Interface and Twin Synthesiser(用于蜂窩式電話的無(wú)線電接口電路和雙合成器)
中文描述: 無(wú)線接口和雙合成器(用于蜂窩式電話的無(wú)線電接口電路和雙合成器)
文件頁(yè)數(shù): 7/39頁(yè)
文件大?。?/td> 379K
代理商: ACE9030
ACE9030
7
Parameter
CONTROL BUS
Clock rate CL input
Clock duty cycle CL input
t
DS
, input data set-up time
t
DH
, input data hold time
t
CWL
, t
CWH
, CL input pulse width (to bus logic)
t
CL
, delay time, clock to latch
t
LW
, latch pulse high time
t
LH
, delay time, latch to clock
t
DSO
, output data set-up time
t
DHO
, output data hold time
t
ZS
, DATA line available to ACE9030
t
ZH
, DATA line released by ACE9030
t
CD
, delay from received message to
transmitted response
Rise and Fall times, all digital inputs:
DIGITAL OUTPUTS
DOUT0 and 1 On time to V
DD
– 0·2 V
DOUT0 and 1 Off time to > 1 M
DOUT5, 6 and 7 rise and fall times
DOUT8 rise and fall time
A to D CONVERTER
Lowest transition, 0000 0000 to 0000 0001
Highest transition, 1111 1110 to 1111 1111
ADC conversion time (20 cycles of CL)
Input scanning rate (CL
÷
40)
Integral Non-linearity
Differential Non-linearity
Power supply sensitivity
CRYSTAL OSCILLATOR
Start-up time of crystal oscillator
Crystal effective series resistance (ESR)
Power dissipation in crystal
D to A CONVERTERS
Full scale output level, DAC1, DAC2 & DAC3
Zero scale output level, DAC1
Zero scale output level, DAC2 & DAC3
Integral Non-linearity
Differential Non-linearity
Output wideband and clock noise:
50 Hz to 1·1 MHz, flat integration
Power supply rejection ratio
Settling time to within 10% of end of step
(DAC3 with external 15 k
resistor)
Output load capacitance, DAC1 and DAC2
Output load capacitance, DAC3
Internal series resistor, DAC1 and DAC2
DAC3 output current, sink or source
Min.
Typ.
Max.
Unit
Conditions
1008
50
kHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cycles
of CL
ns
40
80
80
400
440
230
220
80
80
80
80
4
60
See Fig. 7
See Fig. 7
See Fig. 7
See Fig. 7
See Fig. 7
See Fig. 7
See Fig. 8
See Fig. 8
See Fig. 8
See Fig. 8
See Figs. 8 and 10
600
1200
1200
4
50
100
100
10
10
μ
s
μ
s
μ
s
μ
s
100 nF load and from
LATCHB rising edge
30 pF load and to D.C.
specification noise
0·07
3·35
0·15
3·45
20
25·2
0·23
3·55
V
V
μ
s
kHz
LSB
LSB
Bandgap multiplier
correctly trimmed
CL = 1008 kHz
CL = 1008 kHz
– 1
– 0·8
+ 1
+ 0·8
3
LSB/0.3V
0 to 10 kHz
5
ms
μ
W
25
150
50
3·35
1·0
0·3
– 1
– 0·5
3·45
3·55
1·2
0·5
+ 1
+ 0·5
V
V
V
Bandgap multiplier
trimmed to nominal
reference voltage
LSB
LSB
3
mV
rms
dB
μ
s
30
50 Hz to 25 kHz.
DAC1 and DAC2
10 pF load
6
100
30
40
nF
pF
k
mA
To guarantee stability
7
15
1·0
ELECTRICAL CHARACTERISTICS
These characteristics apply over these ranges of conditions (unless otherwise stated):
T
AMB
= – 40
°
C to + 85
°
C, V
DD
= + 3·6 to + 5·0 V, GND ref. = V
SS
A.C. Characteristics
相關(guān)PDF資料
PDF描述
ACE9030 Radio Interface and Twin Synthesiser
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