- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1888 > A6850KLTR-T (Allegro Microsystems Inc)IC SWITCH INTERFACE 2CHAN 8-SOIC PDF資料下載
參數(shù)資料
| 型號(hào)： | A6850KLTR-T |
| 廠商： | Allegro Microsystems Inc |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH INTERFACE 2CHAN 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 霍爾效應(yīng)開關(guān) |
| 輸入類型： | 電壓 |
| 輸出類型： | 電壓 |
| 接口： | 2 線串口 |
| 電流 - 電源： | 5mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁(yè)面： | 1141 (CN2011-ZH PDF) |
| 其它名稱： | 620-1185-6 |
Dual Channel Switch Interface IC
A6850
5
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Functional Description
SENSE Pin Outputs
The A6850 divides the OUTPUTx pin current by 10 and mirrors
it onto the corresponding SENSEx pin. Putting sense resistors,
RSENSE , from these pins to ground will create a voltage that
can be read by an ADC (analog-to-digital converter). The value
of RSENSE should be chosen so that the voltage drop across the
sense resistor (VRSENSE) does not exceed the maximum voltage
rating of the ADC. For further protection of the ADC, an external
clamping circuit, such as a Zener diode, can be used to clamp any
transient current spikes that may occur on the output that would
be translated onto the SENSE pins.
The sense current is one tenth of the output current, plus an offset
current. This offset current is consistent across the whole range
of the output current. The sense current can be calculated by the
following formula:
ISENSEx = (IOUTPUTx / 10) + ISENSE(ofs) .
(1)
The sense resistor must also be chosen to meet the voltage limits
on the sense pin (see Electrical Characteristics table).
Output Current Limit
The A6850 limits the output current to a maximum current of
IOUTPUTM. The output current will remain at the current limit
until the output load is reduced or the A6850 goes into thermal
shutdown.
The high output current limit allows the bypass capacitor, CBYP,
on the Hall sensor IC to charge up quickly. This allows a high slew
rate on the VCC pin of the Hall sensor IC, ensuring that the sensor
IC Power-On State will be correct. See the Applications Informa-
tion section for schematic diagrams and power calculations.
Output Faults
The A6850 withstands short-to-ground or short-to-battery of the
OUTPUTx pins. In the case of short-to-ground, current is held to
the current limit (IOUTPUTM).
If VOUTPUTx > (VIN + 0.7 V) during a short-to-battery event, the
A6850 monitors VOUTPUTx and disables the outputs. Because the
protection circuitry requires a finite amount of time to disable the
outputs, a bypass capacitor of 1 μF is necessary on VIN. Although
OUTPUTx sinks current into the A6850 in this state, the reverse
current is shunted to ground and does not appear on the VIN pin.
Overvoltage Protection
The A6850 has built-in overvoltage protection against a load
dump on the supply bus. In the case of a load dump, or when VIN
is connected to the battery supply bus and VIN rises above the
overvoltage threshold, VOVP, the A6850 will shut off the outputs.
Sleep Mode
Low-leakage or sleep modes are required in automotive applica-
tions to minimize battery drain when the vehicle is parked. The
A6850 enters sleep mode when both ENABLE pins are low. In
sleep mode, the internal regulators and all other internal circuitry
are disabled.
When enabling an output, the part must first come out of sleep
mode. Consequently, the wake-up time amounts to a propagation
delay before the outputs turn on. Also, the ENABLE pins do not
switch with hysteresis until the regulators stabilize.
After the internal regulators stabilize, internal circuitry is enabled
and the outputs turn on, as shown in figure 3. As long as one
ENABLE pin is held high, the A6850 operates with hysteresis.
Figure 3. Activation Timing Diagram. Exiting Sleep mode via ENABLE
signal to output waveform.
RegOk
VREG
OUTPUT
ENABLE
V
ENABLEL
> t
ON
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AC1226 | IC THERMOCOUPLE COMPENSATOR 8DIP |
| AD1139K | IC DAC SNGL 18BIT 32-CDIP |
| AD14060LBF-4 | IC DSP CMOS 32BIT 308CQFP |
| AD1833AASTZ-REEL | IC DAC AUDIO 24BIT 6CH 48LQFP |
| AD1835AASZ | IC CODEC 2ADC/8DAC 24BIT 52-MQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A6852S/N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Hall Sensor IC |
| A6-853221 | 制造商:DWYER INSTRUMENTS 功能描述:A6-853221 SS PR SW 91-150 PSI |
| A6861KLPTR-T | 功能描述:Motor Driver Power MOSFET Parallel 16-TSSOP-EP 制造商:allegro microsystems, llc 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 電機(jī)類型 - 步進(jìn):- 電機(jī)類型 - AC，DC:無(wú)刷 DC（BLDC），有刷直流 功能:控制器 - 換向，方向管理 輸出配置:前置驅(qū)動(dòng)器 - 半橋（3） 接口:并聯(lián) 技術(shù):功率 MOSFET 步進(jìn)分辨率:- 應(yīng)用:汽車級(jí) 電流 - 輸出:- 電壓 - 電源:4.5 V ~ 50 V 電壓 - 負(fù)載:- 工作溫度:-40°C ~ 150°C（TA） 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬）裸焊盤 供應(yīng)商器件封裝:16-TSSOP-EP 標(biāo)準(zhǔn)包裝:1 |
| A6862KLPTR-T | 功能描述:High-Side Gate Driver IC Non-Inverting 16-TSSOP 制造商:allegro microsystems, llc 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 驅(qū)動(dòng)配置:高壓側(cè) 通道類型:3 相 驅(qū)動(dòng)器數(shù):3 柵極類型:N 溝道 MOSFET 電壓 - 電源:4.5 V ~ 50 V 邏輯電壓?- VIL，VIH:0.4V，0.7V 電流 - 峰值輸出（灌入，拉出）:- 輸入類型:非反相 高壓側(cè)電壓 - 最大值（自舉）:- 上升/下降時(shí)間（典型值）:- 工作溫度:-40°C ~ 150°C（TJ） 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬）裸焊盤 供應(yīng)商器件封裝:16-TSSOP 標(biāo)準(zhǔn)包裝:1 |
| A68764-000 | 制造商:TE Connectivity 功能描述:VARISTOR 33V 250A DISC 5MM 制造商:TE Connectivity 功能描述:VARISTOR 33V 5MM STRAIGHT T/R |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。