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參數(shù)資料
| 型號： | A64E06161G-70 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 1M X 16 Bit Low Voltage Super RAM |
| 中文描述： | 100萬× 16位低電壓超內(nèi)存 |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 310K |
| 代理商： | A64E06161G-70 |
A64E06161
Write Cycle 3-2
(6)
(Byte Enable Controlled)
t
WC
t
WC
t
SKEW
t
SKEW
t
ASC
Address
CE
HB LB
t
AW
t
BW
2
t
WP
t
DW
t
DH
t
WHZ
4
t
OW
t
WP
t
WHZ
4
t
DH
t
DW
t
OW
WE
Data In
Data Out
t
AHC
t
BW
2
t
WR
3
t
WR
3
t
AS
1
t
AS
1
t
SKEW
Notes: 1. t
AS
is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (t
WP
, t
BW
) of a low CE, WE and (HB and, or LB ).
3. t
WR
is measured from the earliest of CE or
WE
or (HB and, or LB ) going high to the end of the Write cycle.
4. OE level is high or low.
5. Transition is measured
±
500mV from steady state. This parameter is sampled and not 100% tested.
6.
ZZ
is high for Write Cycle.
AC Test Conditions
Input Pulse Levels
VCCQ * 0.2 to VCCQ * 0.8
Input Rise And Fall Time
2 ns (10% to90%)
Input and Output Timing Reference Levels
0.5 * VCCQ
Output Load
See Figures 5
30pF
OUT
Test Point
2.7K
VCCQ
2.7K
Figure 5. Output Load Circuit
PRELIMINARY
(November, 2004, Version 0.1)
17
AMIC Technology, Corp.
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PDF描述 |
|---|---|
| A64E06161G-70I | 1M X 16 Bit Low Voltage Super RAM |
| A64E06161G-85 | 1M X 16 Bit Low Voltage Super RAM |
| A64E06161G-85I | 1M X 16 Bit Low Voltage Super RAM |
| A64E16161 | 2M X 16 Bit Low Voltage Super RAM |
| A64E16161G | 2M X 16 Bit Low Voltage Super RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A64E06161G-70I | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit Low Voltage Super RAM |
| A64E06161G-85 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit Low Voltage Super RAM |
| A64E06161G-85I | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit Low Voltage Super RAM |
| A64E16161 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:2M X 16 Bit Low Voltage Super RAM |
| A64E16161G | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:2M X 16 Bit Low Voltage Super RAM |
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