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參數(shù)資料
| 型號(hào)： | A64E06161G-70 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 1M X 16 Bit Low Voltage Super RAM |
| 中文描述： | 100萬× 16位低電壓超內(nèi)存 |
| 文件頁(yè)數(shù)： | 13/20頁(yè) |
| 文件大?。?/td> | 310K |
| 代理商： | A64E06161G-70 |
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A64E06161
AC Characteristics
(T
A
= 0
°
C to + 70
°
C or -25
°
C to 85
°
C, VCC = 1.7V to 1.95V, VCCQ = 1.7V to VCC GND = 0V)
Symbol
Read Cycle
t
RC
t
SKEW
t
AA
t
ACE
t
BE
t
OE
t
CLZ
t
BLZ
t
OLZ
t
CHZ
t
BHZ
t
OHZ
t
OH
t
ASC
Parameter
-70
-85
Unit
Min.
Max.
Min.
Max.
Read Cycle Time
Address Skew
Address Access Time
Chip Enable Access Time
Byte Enable Access Time
Output Enable to Output Valid
Chip Enable to Output in Low Z
Byte Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Byte Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
Address Setup to CE Low
70
-
-
-
-
-
5
5
5
0
0
0
10
0
10000
10
70
70
35
35
-
-
-
14
14
14
-
-
85
-
-
-
-
-
5
5
5
0
0
0
10
0
10000
10
85
85
45
45
-
-
-
14
14
14
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
AHC
Address Hold Time from CE High
0
-
0
-
ns
t
CEH
CE High Pulse With
Page Read Cycle Time
Page access Time
Normal to Page Read Cycle Time
10
-
10
-
ns
t
PC
t
PAA
t
NPPC
25
-
-
-
25
-
-
-
ns
ns
μ
s
25
10
25
10
Write Cycle
t
WC
t
SKEW
t
CW
t
BW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
t
ASC
Write Cycle Time
Address Skew
Chip Enable to End of Write
Byte Enable to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
Address Setup to CE Low
70
-
70
60
0
70
50
0
-
30
0
5
0
10000
10
-
-
-
-
-
-
14
-
-
-
-
85
-
85
70
0
85
60
0
-
35
0
5
0
10000
10
-
-
-
-
-
-
14
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
AHC
Address Hold Time from CE High
0
-
0
-
ns
t
CEH
CE High Pulse With
10
-
10
-
ns
t
WEH
WE High Pulse With
Maximum CE Pulse width
10
-
10
-
ns
t
CEM
-
10
-
10
μ
s
Note: t
CHZ
, t
BHZ
and t
OHZ
and t
WHZ
are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
PRELIMINARY
(November, 2004, Version 0.1)
12
AMIC Technology, Corp.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A64E06161G-70I | 1M X 16 Bit Low Voltage Super RAM |
| A64E06161G-85 | 1M X 16 Bit Low Voltage Super RAM |
| A64E06161G-85I | 1M X 16 Bit Low Voltage Super RAM |
| A64E16161 | 2M X 16 Bit Low Voltage Super RAM |
| A64E16161G | 2M X 16 Bit Low Voltage Super RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A64E06161G-70I | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit Low Voltage Super RAM |
| A64E06161G-85 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit Low Voltage Super RAM |
| A64E06161G-85I | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit Low Voltage Super RAM |
| A64E16161 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:2M X 16 Bit Low Voltage Super RAM |
| A64E16161G | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:2M X 16 Bit Low Voltage Super RAM |
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