
Photoelectric Smoke Detector
with Interconnect, Timer, and Latching Alarm Indicator
A5303
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Selection Guide
Part Number
Pb-free and RoHS
Package
Packing
A5303SESTR-T
Yes
20-contact QFN
1500 pieces / 7-in. reel
A5303SLE-T
Yes
20-pin TSSOP (JEDEC MO-153AC)
75 pieces / tube
A5303SLETR-T
Yes
20-pin TSSOP (JEDEC MO-153AC)
4000 pieces / reel
Absolute Maximum Ratings
Characteristic
Symbol
Notes
Rating
Units
Supply Voltage Range
VDD
Referenced to VSS
–2.3 to 6
V
DC Input Voltage Range
VIN
Referenced to VSS
–0.3 to 6
V
Operating Ambient Temperature Range
TA
Allegro Range S
–20 to 85
C
Maximum Junction Temperature
TJ(max)
150
C
Storage Temperature Range
Tstg
–55 to 150
C
Pin-out Diagram
Thermal Characteristics
Characteristic
Symbol
Test Conditions*
Value Units
Package Thermal Resistance
RθJA
ES Package, 4-layer PCB, based on JEDEC standard
37
C/W
LE Package, estimated, single-layer PCB, minimal exposed copper area
127
C/W
*Additional thermal information available on Allegro website.
Terminal List
Number
Name
Function
ES
LE
14
1
SOUT1
Logic push-pull output for controlling an external sound IC
15
2
SOUT0
Logic push-pull output for controlling an external sound IC
16
3
I/O
Input-output to interconnected detectors
17
4
BLINK
Logic input for enabling/disabling the LED blink during standby
18
5
HUSH
Input for photoamplifier timer mode reference; can also disable timer mode
19
6
ISET
A resistor on this pin connected to VSS sets the IRED output current
20
7
VDD
Positive supply voltage
1
8
IRED
Terminal to drive smoke chamber IR LED
2
9
STROBE
Strobed supply (VDD – 2 V) for photoamplifier low-side reference
3
10
DETECT
Photoamplifier input
4
11
C2
Sets photoamplifier gain in standby mode
5
12
C1
Sets photoamplifier gain in supervisory mode
6
13
LVSET
Optionally used with a resistor to adjust the low-battery threshold
7
14
TRES
Connection for resistor to set clock times/frequency
8
15
VSS
Negative supply voltage
9
16
OSC CAP
Connection for capacitor and resistor to set clock times/frequency
10
17
TEST
Enables push-to-test mode; starts timer mode, if enabled
11
18
HORN
Logic output which optionally enables a boost converter to drive a horn
12
19
LED
Output to drive visible LED
13
20
SOUT2
Logic push-pull output for controlling an external sound IC
PAD
–
Exposed pad for enhanced thermal dissipation
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SOUT1
SOUT0
I/O
BLINK
HUSH
ISET
VDD
IRED
STROBE
DETECT
SOUT2
LED
HORN
TEST
OSC CAP
VSS
TRES
LVSET
C1
C2
LE Package
ES Package
PAD
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
VDD
ISET
HUSH
BLINK
IO
LVSET
TRES
VSS
OSC
CAP
TEST
SOUT0
SOUT1
SOUT2
LED
HORN
IRED
STROBE
DETECT
C2
C1