參數(shù)資料
型號: A43P26161
廠商: AMIC Technology Corporation
英文描述: 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
中文描述: 100萬× 16位× 4個銀行的低功耗同步DRAM
文件頁數(shù): 41/44頁
文件大?。?/td> 1122K
代理商: A43P26161
A43P26161
PRELIMINARY (July, 2005, Version 1.1)
40
AMIC Technology, Corp.
Function Truth Table for CKE (Table 2)
Current
State
CKE
n-1
H
L
CKE
n
X
H
CS
RAS
CAS
WE
Address
Action
Note
X
H
X
X
X
X
X
X
X
X
INVALID
Exit Self Refresh
ABI after t
RC
Exit Self Refresh
ABI after t
RC
ILLEGAL
ILLEGAL
ILLEGAL
NOP(Maintain Self Refresh)
INVALID
Exit Power Down
ABI
Exit Power Down
ABI
ILLEGAL
ILLEGAL
ILLEGAL
NOP(Maintain Power Down Mode)
Refer to Table 1
Enter Power Down
Enter Power Down
ILLEGAL
ILLEGAL
Row (& Bank ) Active
Enter Self Refresh
OPCODE MRS
X
NOP
X
Refer to Operations in Table 1
X
Begin Clock Suspend next cycle
X
Exit Clock Suspend next cycle
X
Maintain clock Suspend
6
L
H
L
H
H
H
X
6
L
L
L
L
H
L
H
H
H
L
X
H
L
L
L
X
X
H
H
H
L
X
X
X
H
L
X
X
X
X
L
X
X
X
X
X
X
X
X
X
X
X
Self
Refresh
7
L
H
L
H
H
H
X
7
L
L
L
L
H
H
H
H
H
H
H
H
L
H
H
L
L
H
H
H
L
H
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
X
X
H
L
L
L
L
L
L
X
X
X
X
X
H
H
L
X
X
X
H
H
H
L
L
L
X
X
X
X
X
H
L
X
X
X
X
H
H
L
H
L
L
X
X
X
X
X
L
X
X
X
X
X
H
L
X
H
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
RA
X
Both
Bank
Precharge
Power
Down
8
8
8
9
9
All
Banks
Idle
Any State
Other than
Listed
Above
Abbreviations : ABI = All Banks Idle
Note: 6. After CKE’s low to high transition to exit self refresh mode, a minimum of t
RC
(min) has to be elapse before issuing a
new command.
7. CKE low to high transition is asynchronous as if it restarts internal clock.
A minimum setup time “tSS + one clock” must be satisfied before any command can be issued other than exit.
8. Power-down and self refresh can be entered only when all the banks are in idle state.
9. Must be a legal command.
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