參數(shù)資料
型號(hào)： A43L8316V-8
廠商： AMIC Technology Corporation
英文描述： 128K X 16 Bit X 2 Banks Synchronous DRAM
中文描述： 128K的× 16位× 2銀行同步DRAM
文件頁(yè)數(shù)： 5/45頁(yè)
文件大?。?/td> 1395K
代理商： A43L8316V-8
A43L8316
Preliminary (April, 2000, Version 1.0)
4
AMIC Technology, Inc.
Absolute Maximum Ratings*
Voltage on any pin relative to VSS (Vin, Vout ) . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +4.6V
Voltage on VDD supply relative to VSS (VDD, VDDQ )
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-1.0V to +4.6V
Storage Temperature (T
STG
) . . . . . . . . . . -55
°
C to +150
°
C
Soldering Temperature X Time (T
SLODER
) . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
°
C X 10sec
Power Dissipation (P
D
) . . . . . . . . . . . . . . . . . . . . . . . . .1W
Short Circuit Current (Ios) . . . . . . . . . . . . . . . . . . . . 50mA
*Comments
Permanent device damage may occur if “Absolute
Maximum Ratings” are exceeded.
Functional operation should be restricted to recommended
operating condition.
Exposure to higher than recommended voltage for
extended periods of time could affect device reliability.
DC Electrical Characteristics
Recommend operating conditions (Voltage referenced to VSS = 0V)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply Voltage
VDD,VDDQ
3.0
3.3
3.6
V
Input High Voltage
V
IH
2.0
3.0
VDD+0.3
V
Input Low Voltage
V
IL
-0.3
0
0.8
V
Note 1
Output High Voltage
V
OH
2.4
-
-
V
I
OH
= -2mA
Output Low Voltage
V
OL
-
-
0.4
V
I
OL
= 2mA
Input Leakage Current
I
IL
-5
-
5
μ
A
Note 2
Output Leakage Current
I
OL
-5
-
5
μ
A
Note 3
Output Loading Condition
See Figure 1
Note:
1. V
IL
(min) = -1.5V AC (pulse width
≤
5ns).
2. Any input 0V
≤
VIN
≤
VDD + 0.3V, all other pins are not under test = 0V
3. Dout is disabled, 0V
≤
Vout
≤
VDD
Decoupling Capacitance Guide Line
Recommended decoupling capacitance added to power line at board.
Parameter
Symbol
Value
Unit
Decoupling Capacitance between VDD and VSS
C
DC1
0.1 + 0.01
μ
F
Decoupling Capacitance between VDDQ and VSSQ
C
DC2
0.1 + 0.01
μ
F
Note:
1. VDD and VDDQ pins are separated each other.
All VDD pins are connected in chip. All VDDQ pins are connected in chip.
2. VSS and VSSQ pins are separated each other
All VSS pins are connected in chip. All VSSQ pins are connected in chip.
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