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參數(shù)資料
| 型號(hào)： | A43L8316V-7 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 128K X 16 Bit X 2 Banks Synchronous DRAM |
| 中文描述： | 128K的× 16位× 2銀行同步DRAM |
| 文件頁數(shù)： | 21/45頁 |
| 文件大小： | 1395K |
| 代理商： | A43L8316V-7 |
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A43L8316
Preliminary (April, 2000, Version 1.0)
20
AMIC Technology, Inc.
10. Clock Suspend Exit & Power Down Exit
11. Auto Refresh & Self Refresh
* Note : 1. Active power down : one or more bank active state.
2. Precharge power down : both bank precharge state.
3. The auto refresh is the same as CBR refresh of conventional DRAM.
No precharge commands are required after Auto Refresh command.
During t
RC
from auto refresh command, any other command can not be accepted.
4. Before executing auto/self refresh command, both banks must be idle state.
5. MRS, Bank Active, Auto/Self Refresh, Power Down Mode Entry.
6. During self refresh mode, refresh interval and refresh operation are performed internally.
After self refresh entry, self refresh mode is kept while CKE is LOW.
During self refresh mode, all inputs expect CKE will be don’t cared, and outputs will be in Hi-Z state.
During t
RC
from self refresh exit command, any other command can not be accepted.
Before/After self refresh mode, burst auto refresh cycle (1024K cycles ) is recommended.
2) Power Down (=Precharge Power Down) Exit
Note 1
CLK
CMD
1) Clock Suspend (=Active Power Down) Exit
RD
t
SS
CKE
Internal
CLK
Note 2
CLK
CMD
ACT
CKE
Internal
CLK
t
SS
NOP
2) Self Refresh
CLK
CMD
1) Auto Refresh
CKE
Internal
CLK
CLK
CMD
SR
CKE
PRE
Note 4
PRE
AR
CMD
Note 5
~
~
~
t
RC
t
RP
Note 3
Note 6
~
CMD
~
Note 4
t
RP
t
RC
~
~
~
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