參數(shù)資料
型號(hào)： A43L8316AV-5
廠商： AMIC Technology Corporation
英文描述： 128K X 16 Bit X 2 Banks Synchronous DRAM
中文描述： 128K的× 16位× 2銀行同步DRAM
文件頁(yè)數(shù)： 9/45頁(yè)
文件大?。?/td> 1008K
代理商： A43L8316AV-5
A43L8316A
(September, 2003, Version 1.0)
8
AMIC Technology, Corp.
Operating AC Parameter
(AC operating conditions unless otherwise noted)
Version
Symbol
Parameter
CAS
Latency
-5
-5.5
-6
-7
Unit
Note
3
t
RRD(min)
Row active to row active delay
2
2
2
2
2
CLK
1
3
3
3
3
3
t
RCD(min)
RAS to
CAS
delay
2
-
-
-
2
CLK
1
3
3
3
3
3
t
RP(min)
Row precharge time
2
-
-
-
2
CLK
1
3
8
8
7
6
t
RAS(min)
2
-
-
-
5
CLK
1
3
t
RAS(max)
Row active time
2
100
μ
s
3
11
11
10
9
t
RC(min)
Row cycle time
2
-
-
-
7
CLK
1
3
t
CDL(min)
Last data in new col. Address delay
2
1
CLK
2
3
2
2
2
2
t
RDL(min)
Last data in row precharge
2
-
-
-
2
CLK
2
3
t
BDL(min)
Last data in to burst stop
2
1
CLK
2
3
t
CCD(min)
Col. Address to col. Address delay
2
1
CLK
3
2
CLK
4
Number of valid output data
2
1
CLK
Note:
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time
and then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
相關(guān)PDF資料
PDF描述
A43L8316AV-5.5 128K X 16 Bit X 2 Banks Synchronous DRAM
A43L8316AV-6 128K X 16 Bit X 2 Banks Synchronous DRAM
A43L8316AV-7 128K X 16 Bit X 2 Banks Synchronous DRAM
A43L8316A 128K X 16 Bit X 2 Banks Synchronous DRAM
A43L8316AV 128K X 16 Bit X 2 Banks Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A43L8316AV-5.5 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 16 Bit X 2 Banks Synchronous DRAM
A43L8316AV-6 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 16 Bit X 2 Banks Synchronous DRAM
A43L8316AV-7 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 16 Bit X 2 Banks Synchronous DRAM
A43L8316G-75I 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
A43L8316G-95I 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
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