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參數(shù)資料
| 型號： | A31W33128C |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | LCD Controller-Driver |
| 中文描述： | LCD控制器驅(qū)動器 |
| 文件頁數(shù)： | 29/34頁 |
| 文件大?。?/td> | 359K |
| 代理商： | A31W33128C |
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A31W33128 Series
PRELIMINARY
(December, 2000, Version 0.1)
28
AMIC Technology, Inc
2. Serial Interface
Serial Interface Timing Characteristics
(Ta=-30 to 85
°
C, VDD=+5V
±
10%)
Signal
Symbol
t
CSS
t
CHS
t
ASS
t
AHS
t
DSS
t
DHS
t
CYCS
t
CLLS
t
CLHS
t
DDS
t
OHS
Designation
Conditions
Min.
50
400
120
200
120
50
500
200
200
Max.
Unit
Note
Chip Select Setup Time
Chip Select Hold Time
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Clock Cycle Time
Clock L Time
Clock H Time
Data Delay Time
Data Disable Time
CS
A0, R/W
D0
(SDI)
D1
(SCLK)
CL=15 pF
CL=15 pF
90
60
D2
(SDO)
10
ns
1
Serial Interface Timing Characteristics
(Ta=-30 to 85
°
C, VDD=+3V
±
10%)
Signal
Symbol
t
CSS
t
CHS
t
ASS
t
AHS
t
DSS
t
DHS
t
CYCS
t
CLLS
t
CLHS
t
DDS
t
OHS
Designation
Conditions
Min.
100
800
240
400
240
100
1000
400
400
10
Max.
180
120
Unit
Note
1
Chip Select Setup Time
Chip Select Hold Time
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Clock Cycle Time
Clock L Time
Clock H Time
Data Delay Time
Data Disable Time
CS
A0, R/W
D0
(SDI)
D1
(SCLK)
CL=15 pF
CL=15 pF
D2
(SDO)
ns
Note : 1. D2(DSO) is high-impedance at the rising edge of the
CS
.
2. Rise/fall time of the signal is 15 nsec. or less
3. Timing is specified at 20% or 80% of the signal waveform.
Serial Interface Read/Write Timing Characteristics
D1
(SCLK)
R/W
CS
t
CHS
t
AHS
t
OHS
t
CS
t
ASS
t
CLLS
t
CYCS
t
CLHS
t
DHS
t
DDS
t
DSS
A0
D0
(SDI)
D2
(SDO)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A31W33128T | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:LCD Controller-Driver |
| A31W65132 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:LCD Controller-Driver |
| A31W65132C | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:LCD Controller-Driver |
| A31W65132T | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:LCD Controller-Driver |
| A-31X | 制造商:Triad Magnetics 功能描述: |
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