Ab s o l u t e Ma x i mu m R a t i n g s 1 Free air temperature range Notes: 1. Str" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A1010B-VQG80C
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 2/98闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FPGA 1200 GATES 80-VQFP COM
妯欐簴鍖呰锛� 90
绯诲垪锛� ACT™ 1
LAB/CLB鏁�(sh霉)锛� 295
杓稿叆/杓稿嚭鏁�(sh霉)锛� 57
闁€鏁�(sh霉)锛� 1200
闆绘簮闆诲锛� 4.5 V ~ 5.5 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 80-TQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 80-VQFP锛�14x14锛�
10
Ab s o l u t e Ma x i mu m R a t i n g s 1
Free air temperature range
Notes:
1.
Stresses beyond those listed under 鈥淎bsolute Maximum Ratings鈥�
may cause permanent damage to the device. Exposure to
absolute maximum rated conditions for extended periods may
affect device reliability. Devices should not be operated outside
the recommended operating conditions.
2.
VPP = VCC , except during device programming.
3.
VSV = VCC , except during device programming.
4.
VKS = GND , except during device programming.
5.
Device inputs are normally high impedance and draw extremely
low current. However, when input voltage is greater than VCC +
0.5V or less than GND 鈥� 0.5V, the internal protection diode will be
forward biased and can draw excessive current.
Re com m e nde d Op er at i n g Co ndi t i on s
Notes:
1.
Ambient temperature (TA) is used for commercial and
industrial; case temperature (TC) is used for military.
2.
All power supplies must be in the recommended operating range.
For more information, refer to the Power-Up Design Considerations
application note at http://www.actel.com/appnotes.
E l e c tric a l S p e c ific a t io n s
Notes:
1.
Actel devices can drive and receive either CMOS or TTL signal levels. No assignment of I/Os as TTL or CMOS is required.
2.
Tested one output at a time, VCC = min.
3.
Not tested; for information only.
4.
VOUT = 0V, f = 1 MHz
Symbol
Parameter
Limits
Units
VCC
DC Supply Voltage2, 3, 4
鈥�0.5 to +7.0
V
VI
Input Voltage
鈥�0.5 to VCC +0.5
V
VO
Output Voltage
鈥�0.5 to VCC +0.5
V
IIO
I/O Source Sink
Current5
卤20
mA
TSTG
Storage Temperature
鈥�65 to +150
掳C
Parameter
Commercial
Military
Units
Temperature
Range1
0 to +70
鈥�55 to +125
掳C
Power Supply
Tolerance2
卤5
卤10
%VCC
Symbol
Parameter
Test Condition
Commercial
Military
Units
Min.
Max.
Min.
Max.
VOH
1, 2
HIGH Level Output
IOH = 鈥�4 mA (CMOS)
3.7
V
IOH = 鈥�6 mA (CMOS)
3.84
V
VOL
1, 2
LOW Level Output
IOL = +6 mA (CMOS)
0.33
0.4
V
VIH
HIGH Level Input
TTL Inputs
2.0
VCC + 0.3
2.0
VCC + 0.3
V
VIL
LOW Level Input
TTL Inputs
鈥�0.3
0.8
鈥�0.3
0.8
V
IIN
Input Leakage
VI = VCC or GND
鈥�10
+10
鈥�10
+10
A
IOZ
3-state Output Leakage
VO = VCC or GND
鈥�10
+10
鈥�10
+10
A
CIO
I/O Capacitance3, 4
10
pF
ICC(S)
Standby VCC Supply Current VI = VCC or GND, IO = 0 mA
ACT 1
3
20
mA
ACT 2/3/1200XL/3200DX
2
20
mA
ICC(D)
Dynamic VCC Supply Current
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
M1AGL1000V5-FGG484 IC FPGA 1KB FLASH 1M 484-FBGA
M1AGL1000V5-FG484 IC FPGA 1KB FLASH 1M 484-FBGA
AGL1000V5-FG484 IC FPGA 1KB FLASH 1M 484FBGA
AFS600-FGG484 IC FPGA 4MB FLASH 600K 484FBGA
M1AFS600-FG484 IC FPGA 4MB FLASH 600K 484-FBGA
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
A1010B-VQG80I 鍔熻兘鎻忚堪:IC FPGA 1200 GATES 80-VQFP IND RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪锛� 绯诲垪:ACT™ 1 妯欐簴鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�(sh霉):6036 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:- 杓稿叆/杓稿嚭鏁�(sh霉):360 闁€鏁�(sh霉):108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:484-FPBGA锛�27X27锛�
A1010J1AQE2 鍒堕€犲晢:Switchcraft 鍔熻兘鎻忚堪:TOGGLE SWITCH
A1010-JQ44B 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:Field Programmable Gate Array (FPGA)
A1010-JQ44C 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:Field Programmable Gate Array (FPGA)
A1010-JQ44I 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:Field Programmable Gate Array (FPGA)
鐧�(f膩)甯冪穵鎬ラ噰璩�锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�

閲囪臣闇€姹�

(鑻ュ彧閲囪臣涓€姊濆瀷铏燂紝濉涓€琛屽嵆鍙�)

鐧�(f膩)甯冩垚鍔�锛佹偍鍙互绻肩簩(x霉)鐧�(f膩)甯冮噰璩笺€備篃鍙互閫插叆鎴戠殑鍚庤嚭锛屾煡鐪嬪牨鍍�

鐧�(f膩)甯冩垚鍔�锛佹偍鍙互绻肩簩(x霉)鐧�(f膩)甯冮噰璩笺€備篃鍙互閫插叆鎴戠殑鍚庤嚭锛屾煡鐪嬪牨鍍�

*鍨嬭櫉 *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉 灏佽
娣诲姞鏇村閲囪臣

鎴戠殑鑱�(li谩n)绯绘柟寮�

*
*
*
    • 閹达拷
    • 闁插洩鍠�
    • 閹兼粎鍌�
    • 娴兼艾鎲�