P ack ag e Mec h a n i c a l Dr awi n gs (continued) 132-Pin, 172-Pin, 19 6-Pi n, 208- Pi n, and 256" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A1010B-VQ80C
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 96/98闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FPGA 1200 GATES 80-VQFP COM
妯欐簴鍖呰锛� 90
绯诲垪锛� ACT™ 1
LAB/CLB鏁�(sh霉)锛� 295
杓稿叆/杓稿嚭鏁�(sh霉)锛� 57
闁€鏁�(sh霉)锛� 1200
闆绘簮闆诲锛� 4.5 V ~ 5.5 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 80-TQFP
渚涙噳鍟嗚ō鍌欏皝瑁濓細 80-VQFP锛�14x14锛�
96
P ack ag e Mec h a n i c a l Dr awi n gs (continued)
132-Pin, 172-Pin, 19 6-Pi n, 208- Pi n, and 256-Pin CQFP (Cav ity Up)
Notes:
1.
Outside leadframe holes (from dimension H) are circular for the CQ208 and CQ256.
2.
Seal ring and lid are connected to Ground.
3.
Lead material is Kovar with minimum 50 microinches gold plate over nickel.
4.
Packages are shipped unformed with the ceramic tie bar.
5.
32200DX 鈥� CQ208 has a heat sink on the back.
A
b
H
D1
D2
E2
E1
F
L1
K
Ceramic
Tie Bar
No. 1
e
A1
C
Lead Kovar
Lid
Top View
Side View
鐩搁棞PDF璩囨枡
PDF鎻忚堪
A1010B-VQG80C IC FPGA 1200 GATES 80-VQFP COM
M1AGL1000V5-FGG484 IC FPGA 1KB FLASH 1M 484-FBGA
M1AGL1000V5-FG484 IC FPGA 1KB FLASH 1M 484-FBGA
AGL1000V5-FG484 IC FPGA 1KB FLASH 1M 484FBGA
AFS600-FGG484 IC FPGA 4MB FLASH 600K 484FBGA
鐩搁棞浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
A1010BVQ80I 鍒堕€犲晢:Microsemi SOC Products Group 鍔熻兘鎻忚堪:1010BVQ80I
A1010B-VQ80I 鍔熻兘鎻忚堪:IC FPGA 1200 GATES 80-VQFP IND RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ACT™ 1 妯欐簴鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�(sh霉):6036 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:- 杓稿叆/杓稿嚭鏁�(sh霉):360 闁€鏁�(sh霉):108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳鍟嗚ō鍌欏皝瑁�:484-FPBGA锛�27X27锛�
A1010B-VQG80C 鍔熻兘鎻忚堪:IC FPGA 1200 GATES 80-VQFP COM RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ACT™ 1 妯欐簴鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�(sh霉):6036 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:- 杓稿叆/杓稿嚭鏁�(sh霉):360 闁€鏁�(sh霉):108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳鍟嗚ō鍌欏皝瑁�:484-FPBGA锛�27X27锛�
A1010B-VQG80I 鍔熻兘鎻忚堪:IC FPGA 1200 GATES 80-VQFP IND RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ACT™ 1 妯欐簴鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�(sh霉):6036 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:- 杓稿叆/杓稿嚭鏁�(sh霉):360 闁€鏁�(sh霉):108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳鍟嗚ō鍌欏皝瑁�:484-FPBGA锛�27X27锛�
A1010J1AQE2 鍒堕€犲晢:Switchcraft 鍔熻兘鎻忚堪:TOGGLE SWITCH