- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25570 > 9LPRS502YKLFT (INTEGRATED DEVICE TECHNOLOGY INC) SPECIALTY MICROPROCESSOR CIRCUIT, PQCC56 PDF資料下載
參數(shù)資料
| 型號(hào)： | 9LPRS502YKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC56 |
| 封裝： | ROHS COMPLIANT, MLF-56 |
| 文件頁數(shù)： | 28/29頁 |
| 文件大小： | 272K |
| 代理商： | 9LPRS502YKLFT |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁
IDTTM/ICSTM
56-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor
1125A—02/19/08
Advance Information
ICS9LPRS502
56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR
8
Datasheet
MLF Pin Description (Continued)
PIN #
PIN NAME
TYPE
DESCRIPTION
15
VDD48
PWR
Power supply for USB clock, nominal 3.3V.
16
USB_48MHz/FSLA
I/O
Fixed 48MHz USB clock output. 3.3V./ 3.3V tolerant input for CPU frequency selection. Refer to input electrical
characteristics for Vil_FS and Vih_FS values.
17
GND48
PWR
Ground pin for the 48MHz outputs.
18
VDD96_IO
PWR
Power supply for DOT96 output. 1.05 to 3.3V +/-5%.
19
DOTT_96/SRCT0
OUT
True clock of SRC or DOT96. The power-up default function is SRC0. After powerup, this pin function may be
changed to DOT96 via SMBus Byte 1, bit 7 as follows:
0= SRC0
1=DOT96
20
DOTC_96/SRCC0
OUT
Complement clock of SRC or DOT96. The power-up default function is SRC0#. After powerup, this pin function
may be changed to DOT96# via SMBus Byte 1, bit 7 as follows
0= SRC0#
1=DOT96#
21
GND
PWR
Ground pin for the DOT96 clocks.
22
VDD
PWR
Power supply for SRC / SE1 and SE2 clocks, 3.3V nominal.
23
SRCT1/SE1
OUT
True clock of differential SRC1 clock pair / 3.3V single-ended output. The powerup default is 100 MHz SRC, -0.5%
downspread. The pin function may be changed via SMBus B1b[4:1]
24
SRCC1/SE2
OUT
Complement clock of differential SRC1 clock pair / 3.3V single-ended output. The powerup default is 100 MHz
SRC, -0.5% downspread. The pin function may be changed via SMBus B1b[4:1]
25
GND
PWR
Ground pin for SRC / SE1 and SE2 clocks, PLL3.
26
VDDPLL3_IO
PWR
Power supply for PLL3 output. 1.05 to 3.3V +/-5%.
27
SRCT2/SATAT
OUT
True clock of differential SRC/SATA clock pair.
28
SRCC2/SATAC
OUT
Complement clock of differential SRC/SATA clock pair.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 9LPRS511EGLF | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO64 |
| 9LPRS525AFLFT | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO56 |
| 9LPRS535BFLF | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO48 |
| 9LPRS535CFLF | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO48 |
| 9LPRS535CGLFT | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9LPRS509HGLF | 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS509HGLF LOGIC AND TIMING MISC - Rail/Tube 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS509HGLF Logic and Timing Misc |
| 9LPRS509PGLF | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS509PGLFT | 制造商:Integrated Device Technology Inc 功能描述:PC MAIN CLOCK 制造商:Integrated Device Technology Inc 功能描述:64 TSSOP (LEAD FREE) - Tape and Reel |
| 9LPRS511EGLF | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS511EGLFT | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。