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參數(shù)資料
| 型號： | 9EX21831AKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-72 |
| 文件頁數(shù)： | 5/17頁 |
| 文件大?。?/td> | 179K |
| 代理商： | 9EX21831AKLFT |
IDT
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
1678A—07/13/10
9EX21831
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
13
SMBusTable: Output, and PLL BW Control Register
Pin #
Name
Control Function
Type0
1
Default
Bit 7
RW
Latch
Bit 6
RW
Latch
Bit 5
DIF_17
Output Control
RW
Hi-Z
Enable
1
Bit 4
DIF_16
Output Control
RW
Hi-Z
Enable
1
Bit 3
0
Bit 2
1
Bit 1
0
Bit 0
1
SMBusTable: Output Control Register
Pin #
Name
Control Function
Type0
1
Default
Bit 7
DIF_7
Output Control
RW
Hi-Z
Enable
1
Bit 6
DIF_6
Output Control
RW
Hi-Z
Enable
1
Bit 5
DIF_5
Output Control
RW
Hi-Z
Enable
1
Bit 4
DIF_4
Output Control
RW
Hi-Z
Enable
1
Bit 3
DIF_3
Output Control
RW
Hi-Z
Enable
1
Bit 2
DIF_2
Output Control
RW
Hi-Z
Enable
1
Bit 1
DIF_1
Output Control
RW
Hi-Z
Enable
1
Bit 0
DIF_0
Output Control
RW
Hi-Z
Enable
1
SMBusTable: Output Control Register
Pin #
Name
Control Function
Type0
1
Default
Bit 7
DIF_15
Output Control
RW
Hi-Z
Enable
1
Bit 6
DIF_14
Output Control
RW
Hi-Z
Enable
1
Bit 5
DIF_13
Output Control
RW
Hi-Z
Enable
1
Bit 4
DIF_12
Output Control
RW
Hi-Z
Enable
1
Bit 3
DIF_11
Output Control
RW
Hi-Z
Enable
1
Bit 2
DIF_10
Output Control
RW
Hi-Z
Enable
1
Bit 1
DIF_9
Output Control
RW
Hi-Z
Enable
1
Bit 0
DIF_8
Output Control
RW
Hi-Z
Enable
1
SMBusTable: Output Enable Readback Register
Pin #
Name
Control Function
Type0
1
Default
Bit 7
OE11# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 6
OE10# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 5
OE9# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 4
OE8# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 3
OE7# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 2
OE6# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 1
OE5# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 0
OE_01234# Input
Pin Readback
R
Pin Low
Pin Hi
X
RESERVED
Byte 0
Byte 2
Byte 1
PLL_BW# adjust
BYPASS# test mode / PLL
4
36
52
49
59
56
2
5
Byte 3
72
RESERVED
00 = Low BW (1MHz)
10 = Bypass
11 = High BW (3MHz)
RESERVED
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