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參數(shù)資料
| 型號(hào)： | 9883 |
| 廠商： | Intel Corp. |
| 英文描述： | Advanced 10/100 Umnmanaged Repeater |
| 中文描述： | 高級(jí)10/100 Umnmanaged直放站 |
| 文件頁數(shù)： | 47/56頁 |
| 文件大小： | 719K |
| 代理商： | 9883 |
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Advanced 10/100 Unmanaged Repeater
—
LXT9883/9863
Datasheet
Document #: 249115
Revision #: 003
Rev. Date: 08/07/01
47
Table 25. 100BASE-TX Transceiver Electrical Characteristics
Parameter
Symbol
Min
Typ
1
Max
Units
Test Conditions
Peak differential output voltage
(single ended)
V
P
0.95
1.0
1.05
V
Note 2
Signal amplitude symmetry
–
98
–
102
%
Note 2
Signal rise/fall time
Trf
3.0
–
5.0
ns
Note 2
Rise/fall time symmetry
Trfs
–
–
0.5
ns
Note 2
Duty cycle distortion
–
–
–
+/- 0.5
ns
Offset from 8 ns pulse width at 50%
of pulse peak,
Overshoot
Vo
–
–
5
%
–
1. Typical values are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
2. Measured at line side of transformer, line replaced by 100
(±1%) resistor.
Table 26. 10BASE-T Transceiver Electrical Characteristics
Parameter
Symbol
Min
Typ
1
Max
Units
Test Conditions
Transmitter
Peak differential output voltage
V
P
2.2
2.5
2.8
V
Measured at line side of
transformer, line replaced by 100
(± .1%) resistor
Transmit timing jitter addition
2
–
8
–
24
ms
0 line length for internal MAU
Transmit timing jitter added by the
MAU and PLS sections
–
0
–
11
ns
After line model specified by IEEE
802.3 for 10BASE-T internal MAU
Receiver
Receive input impedance
Z
IN
–
20
–
k
Between TPIP/TPIN
Differential Squelch Threshold
V
DS
–
390
–
mV
5 MHz square wave input,
750 mVpp
1. Typical values are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
2. Parameter is guaranteed by design; not subject to production testing.
3. IEEE 802.3 specifies maximum jitter additions at 1.5 ns for the AUI cable, 0.5 ns from the encoder, and 3.5 ns from the MAU.
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