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參數(shù)資料
| 型號： | 9883 |
| 廠商： | Intel Corp. |
| 英文描述： | Advanced 10/100 Umnmanaged Repeater |
| 中文描述： | 高級10/100 Umnmanaged直放站 |
| 文件頁數(shù)： | 33/56頁 |
| 文件大?。?/td> | 719K |
| 代理商： | 9883 |
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Advanced 10/100 Unmanaged Repeater
—
LXT9883/9863
Datasheet
Document #: 249115
Revision #: 003
Rev. Date: 08/07/01
33
4.2
Power and Ground
4.2.1
Supply Filtering
Power supply ripple and digital switching noise on the VCC plane causes EMI and degrades line
performance. Predicting a design
’
s performance is difficult, although certain factors greatly
increase the risks:
Poorly-regulated or over-burdened power supplies.
Wide data busses (>32-bits) running at a high clock rate.
DC-to-DC converters.
Many of these issues can be improved by following good general design guidelines. In addition,
Intel recommends filtering between the power supply and the analog VCC pins of the LXT98x3.
Filtering has two benefits. First, it keeps digital switching noise out of the analog circuitry inside
the LXT98x3, which helps line performance. Second, if the VCC planes are laid out correctly, it
keeps digital switching noise away from external connectors, reducing EMI.
The VCC plane should be divided into two sections. The digital section supplies power to the
digital VCC pins and to the external components. The analog section supplies power to VCCR and
VCCT pins of the LXT98x3. The break between the two planes should run under the device. In
designs with more than one LXT98x3, use a single continuous analog VCC plane to supply them
all.
The digital and analog VCC planes should be joined at one or more points by ferrite beads. The
beads should produce at least a 100
impedance at 100 MHz. The beads should be placed so
current flows evenly. The maximum current rating of the beads should be at least 150% of the
current that is actually expected to flow through them. Each LXT98x3 draws a maximum of
1000 mA from the analog supply so beads rated at 1500 mA should be used. A bulk cap (2.2 -10
μ
F) should be placed on each side of each ferrite bead to ground to stop switching noise from
traveling through the ferrite.
In addition, a high-frequency bypass cap (.01
μ
f) should be placed near each analog VCC pin to
ground.
4.2.2
Ground Noise
The best approach to minimize ground noise is strict use of good general design guidelines and by
filtering the VCC plane.
4.2.3
Power and Ground Plane Layout Considerations
The power and ground planes should be laid out carefully. The following guidelines are
recommended:
Follow the guidelines in the
Application Note 113 (LXT98x3 Design and Layout Guide)
for
locating the split between the digital and analog VCC planes.
Keep the digital VCC plane away from the TPOP/N and TPIP/N signals, magnetics, and RJ-45
connectors.
Place the layers so the TPOP/N and TPIP/N signals are routed near or next to the ground
plane. For EMI, it is more important to shield TPOP/N than TPIP/N.
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