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參數(shù)資料
| 型號(hào)： | 935271530118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 時(shí)鐘及定時(shí) |
| 英文描述： | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-137-1, SO-24 |
| 文件頁(yè)數(shù)： | 10/17頁(yè) |
| 文件大?。?/td> | 329K |
| 代理商： | 935271530118 |
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Philips Semiconductors
PCK351
1:10 clock distribution device with 3-State outputs
Product data
Rev. 01 — 14 May 2002
2 of 17
9397 750 09791
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
3.
Quick reference data
[1]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
∑ (C
L × VCC
2
× f
o) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
[2]
The condition is VI = GND to VCC.
4.
Ordering information
Table 1:
Quick reference data
GND = 0 V; Tamb =25 °C; tr =tf ≤ 3.0 ns.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPHL/tPLH
propagation delay: A to Yn
CL = 50 pF; VCC = 3.3 V
-
4.5
-
ns
Ci
input capacitance
VI =VCC or GND
-
4
-
pF
Co
output capacitance
VI =VCC or GND
-
6
-
pF
CPD
power dissipation capacitance
CL = 50 pF; f = 1 MHz
-
48
-
pF
Table 2:
Ordering information
Temperature range =
65 °C to +150 °C.
Type number
Package
Name
Description
Version
PCK351D
SO24
plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
PCK351DB
SSOP24
plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
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