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參數(shù)資料
| 型號(hào)： | 935270390557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVT SERIES, QUAD 8-BIT DRIVER, TRUE OUTPUT, PBGA96 |
| 封裝： | 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, LFBGA-96 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 79K |
| 代理商： | 935270390557 |
2002 Mar 20
2
Philips Semiconductors
Product specication
3.3 V 32-bit edge-triggered D-type ip-op;
3-state
74LVT32374
FEATURES
32-bit edge-triggered flip-flop
3-state buffers
Output capability: +64 mA/32 mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V
supply
Bus-hold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-state
No bus current loading when output is tied to 5 V bus
Latch-up protection exceeds 500 mA in accordance with
JEDEC std 17
ESD protection exceeds 2000 V in accordance with
MIL STD 883 method 3015 and 200 V in accordance
with Machine Model.
DESCRIPTION
The 74LVT32374 is a high-performance BICMOS product
designed for VCC operation at 3.3 V.
The 74LVT32374 is a 32-bit edge-triggered D-type flip-flop
featuring non-inverting 3-state outputs. The device can be
used as four 8-bit flip-flops, or two 16-bit flip-flops or one
32-bit flip-flop. On the positive transition of the clock (CP),
the Q outputs of the flip-flop take on the logic levels set-up
at the D inputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf ≤ 2.5 ns.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
propagation delay nCP to nQn
CL = 50 pF; VCC = 3.3 V
2.9
ns
CI
input capacitance
VI = 0 or 3.0 V
3
pF
CO
output capacitance
outputs disabled; VO = 0 or 3.0 V
9
pF
ICCZ
total supply current
output disabled; VCC = 3.6 V
140
A
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