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| 型號(hào)： | 935270071112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PDIP40 |
| 封裝： | 0.600 INCH, PLASTIC, MO-015, SOT-129-1, DIP-40 |
| 文件頁(yè)數(shù)： | 29/56頁(yè) |
| 文件大?。?/td> | 705K |
| 代理商： | 935270071112 |
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Philips Semiconductors
SC16C550
Universal Asynchronous Receiver/Transmitter (UART)
with 16-byte FIFO and infrared (IrDA) encoder/decoder
Product data
Rev. 04 — 13 March 2003
35 of 52
9397 750 11206
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
Applies to external clock, crystal oscillator max 24 MHz.
[2]
Applicable only when AS is tied LOW.
[3]
= 333 ns (for Baudratemax = 1.5 Mbits/s)
= 1
s (for Baudratemax = 460.8 kbits/s)
= 4
s (for Baudrate
max = 115.2 kbits/s)
[4]
When in both DMA mode 0 and FIFO enable mode, the write cycle delay should be larger than one x1 clock cycle.
10.1 Timing diagrams
t28d
delay from start to reset TXRDY
-
8-
8Rclk
tRESET
Reset pulse width
100
-
40
-
40
-
ns
N
baud rate divisor
1
216
11
216
11
216
1R
clk
Table 27:
AC electrical characteristics…continued
Tamb = 40 °C to +85 °C; VCC = 2.5 V, 3.3 V or 5.0 V ±10%, unless otherwise specied.
Symbol
Parameter
Conditions
2.5 V
3.3 V
5.0 V
Unit
Min
Max
Min
Max
Min
Max
IOWstrobemax
1
2 Baudrate
max
()
--------------------------------------
=
Fig 11. General read timing when using AS signal.
DATA
ACTIVE
VALID
ADDRESS
002aaa331
t4w
t7d
t5s
t7w
A0–A2
CS2
CS1–CS0
IOR, IOR
D0–D7
t5h
t6h
t6s
t8d
t7h
t9d
DDIS
t11d
ACTIVE
t12d
t12h
AS
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