參數(shù)資料
型號(hào): 935270071112
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 微控制器/微處理器
英文描述: 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PDIP40
封裝: 0.600 INCH, PLASTIC, MO-015, SOT-129-1, DIP-40
文件頁(yè)數(shù): 24/56頁(yè)
文件大?。?/td> 705K
代理商: 935270071112
Philips Semiconductors
SC16C550
Universal Asynchronous Receiver/Transmitter (UART)
with 16-byte FIFO and infrared (IrDA) encoder/decoder
Product data
Rev. 04 — 13 March 2003
30 of 52
9397 750 11206
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
Whenever any MSR bit 0-3 is set to logic 1, a Modem Status Interrupt will be generated.
7.9 Scratchpad Register (SPR)
The SC16C550 provides a temporary data register to store 8 bits of user information.
7.10 Enhanced Feature Register (EFR)
Enhanced features are enabled or disabled using this register.
Bits 0 through 4 provide single or dual character software ow control selection.
When the Xon1 and Xon2 and/or Xoff1 and Xoff2 modes are selected, the double
8-bit words are concatenated into two sequential numbers.
1
MSR[1]
DSR [1]
Logic 0 = No DSR change (normal default condition).
Logic1=The DSR input to the SC16C550 has changed state since
the last time it was read. A modem Status Interrupt will be generated.
0
MSR[0]
CTS [1]
Logic 0 = No CTS change (normal default condition).
Logic 1 = The CTS input to the SC16C550 has changed state since
the last time it was read. A modem Status Interrupt will be generated.
Table 20:
Modem Status Register bits description…continued
Bit
Symbol
Description
Table 21:
Enhanced Feature Register bits description
Bit
Symbol
Description
7
EFR[7]
Automatic CTS ow control.
Logic0=Automatic CTS ow control is disabled (normal default
condition).
Logic 1 = Enable Automatic CTS ow control. Transmission will stop
when CTS goes to a logical 1. Transmission will resume when the CTS
pin returns to a logical 0.
6
EFR[6]
Automatic RTS ow control. Automatic RTS may be used for hardware ow
control by enabling EFR[6]. When Auto-RTS is selected, an interrupt will
be generated when the receive FIFO is lled to the programmed trigger
level and RTS will go to a logic 1 at the next trigger level. RTS will return to
a logic 0 when data is unloaded below the next lower trigger level
(programmed trigger level 1). The state of this register bit changes with the
status of the hardware ow control. RTS functions normally when
hardware ow control is disabled.
0 = Automatic RTS ow control is disabled (normal default condition).
1 = Enable Automatic RTS ow control.
相關(guān)PDF資料
PDF描述
935270058512 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQCC44
935270058518 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQCC44
935270070151 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48
935270070157 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48
935270075551 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP80
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935270713557 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP
935270792551 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270792557 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270793551 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA
935270793557 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA