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| 型號： | 935270051512 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC68 |
| 封裝： | PLASTIC, MS-018, SOT-188-2, LCC-68 |
| 文件頁數(shù)： | 21/55頁 |
| 文件大?。?/td> | 706K |
| 代理商： | 935270051512 |
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Philips Semiconductors
SC16C654/654D
Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder
Product data
Rev. 02 — 13 March 2003
28 of 52
9397 750 10985
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
5
MCR[5]
Xon Any.
Logic 0 = Disable Xon Any function (for 16C550 compatibility)
(normal default condition).
Logic 1 = Enable Xon Any function. In this mode, any RX character
received will enable Xon
4
MCR[4]
Loop-back. Enable the local loop-back mode (diagnostics). In this
mode the transmitter output (TX) and the receiver input (RX), CTS,
DSR, CD, and RI are disconnected from the SC16C654/654D I/O
pins. Internally the modem data and control pins are connected into a
loop-back data conguration (see Figure 8). In this mode, the receiver
and transmitter interrupts remain fully operational. The Modem
Control Interrupts are also operational, but the interrupts’ sources are
switched to the lower four bits of the Modem Control. Interrupts
continue to be controlled by the IER register.
Logic 0 = Disable loop-back mode (normal default condition).
Logic 1 = Enable local loop-back mode (diagnostics).
3
MCR[3]
OP2, INTx enable. Used to control the modem CD signal in the
loop-back mode.
Logic 0 = Forces INTA-INTD outputs to the 3-State mode during
the 16 mode (normal default condition). In the loop-back mode,
sets OP2 (CD) internally to a logic 1.
Logic 1 = Forces the INTA-INTD outputs to the active mode during
the 16 mode. In the loop-back mode, sets OP2 (CD) internally to a
logic 0.
2
MCR[2]
OP1. This bit is used in the Loop-back mode only. In the loop-back
mode, this bit is used to write the state of the modem RI interface
signal via OP1.
1
MCR[1]
RTS
Logic 0 = Force RTS output to a logic 1 (normal default condition).
Logic1=Force RTS output to a logic 0.
Automatic RTS may be used for hardware ow control by enabling
EFR[6]. See Table 22.
0
MCR[0]
DTR
Logic 0 = Force DTR output to a logic 1 (normal default condition).
Logic 1 = Force DTR output to a logic 0.
Table 19:
Modem Control Register bits description…continued
Bit
Symbol
Description
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