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參數(shù)資料
| 型號： | 935269846112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT-362-1, TSSOP-48 |
| 文件頁數(shù)： | 2/14頁 |
| 文件大小： | 89K |
| 代理商： | 935269846112 |
Philips Semiconductors
Product data
PCK2022RA
CK00 (100/133 MHz) spread spectrum differential
system clock generator
2001 Jun 12
10
AC WAVEFORMS
VM = 1.25 V @ VDDL and 1.5 V @ VDD3
VX = VOL + 0.3 V
VY = VOH – 0.3 V
VOL and VOH are the typical output voltage drop that occur with the output load.
50%
HOST CLK
VOH
VSS
VOH
tSKEW
HOST_BAR
CLK
50%
SW00667
50%
tPERIOD
Figure 1. HOST CLOCK
VDDL
VOH = 2.4 V
VIH = 2.0 V
1.5 V
VIL = 0.7 V
VOL = 0.4 V
VSS
SYSTEM
MEASUREMENT
POINTS
COMPONENT
MEASUREMENT
POINTS
SW00668
Figure 2. 3.3 V clock waveforms
tPLZ
tPZL
VI
SEL1,
SEL0
GND
VDD
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
VSS
outputs
enabled
outputs
enabled
outputs
disabled
tPHZ
VM
tPZH
VX
VY
SW00662
Figure 3. State enable and disable times
PULSE
GENERATOR
RT
VI
DUT
VO
CL
VDD
TEST
S1
tPLH/tPHL
Open
tPLZ/tPZL
2 VDD
tPHZ/tPZH
VSS
Open
VSS
S1
2
VDD
VDD = VDDL or VDD3, depending on the output.
500
500
SW00660
Figure 4. Load circuitry for switching times
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