參數(shù)資料
型號(hào): 935263376025
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 通信及網(wǎng)絡(luò)
英文描述: SPECIALTY TELECOM CIRCUIT, UUC13
封裝: DIE-13
文件頁(yè)數(shù): 26/26頁(yè)
文件大?。?/td> 258K
代理商: 935263376025
2000 Mar 29
9
Philips Semiconductors
Product specication
SDH/SONET STM4/OC12
transimpedance amplier
TZA3023
Notes
1. PSRR is defined as the ratio of the equivalent current change at the input (
IIPhoto) to a change in supply voltage:
For example, a + 4 mV disturbance on VCC at 10 MHz will typically add an extra 8 nA to the photodiode current. The
external capacitor between pins DREF and GND has a large impact on the PSRR. The specification is valid with an
external capacitor of 1 nF. The PSSR is guaranteed by design.
2. The Pulse Width Distortion (PWD) is <5% over the whole input current range. The PWD is defined as:
where T is the clock period. The PWD is measured differentially with
PRBS pattern of 1023.
3. All In(tot) measurements were made with an input capacitance of Ci = 1.2 pF. This was comprised of 0.7 pF for the
photodiode itself, with 0.3 pF allowed for the printed-circuit board layout and 0.2 pF intrinsic to the package. Noise
performance is measured differentially.
Data outputs: pins OUT and OUTQ
Vo(cm)
common mode output voltage AC coupled; RL =50
VCC 2VCC 1.7
VCC 1.4
V
Vo(se)(p-p)
single-ended output voltage
(peak-to-peak value)
AC coupled; RL =50 ;
input current 100
A (p-p)
75
200
330
mV
VOO
differential output offset
voltage
100
0
+100
mV
Ro(se)
single-ended output
resistance
DC tested
40
50
62
tr, tf
rise time, fall time
VCC = 5 V; 20% to 80%;
input current <10
A (p-p)
400
510
700
ps
VCC = 3.3 V; 20% to 80%;
input current <10
A (p-p)
450
550
700
ps
Automatic gain control loop: pad AGC
Ith(AGC)
AGC threshold current
referred to the peak input
current; tested at 10 MHz
10
A
tatt(AGC)
AGC attack time
5
s
tdecay(AGC)
AGC decay time
10
ms
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PSRR
I
IPhoto
V
CC
--------------------
=
PWD
pulse width
T
------------------------------
1
100%
×
=
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