參數(shù)資料
型號(hào)： 935262891026
廠商： NXP SEMICONDUCTORS
元件分類： 數(shù)字傳輸電路
英文描述： ATM/SONET/SDH SUPPORT CIRCUIT, UUC32
封裝： DIE-32
文件頁(yè)數(shù)： 4/30頁(yè)
文件大?。?/td> 211K
代理商： 935262891026
1999 Nov 03
12
Philips Semiconductors
Product specication
SDH/SONET STM1/OC3 postamplier
TZA3034
Notes
1. PECL outputs (pins DOUT, DOUTQ, ST and STQ) are not connected.
2. Maximum currents are specified at Tj = 125 °C, VCC = 5.5 V and worst case processing.
3. 2 mV (p-p) single-ended is the minimum input signal to achieve full clipping of the output signal. Typical an input
signal of 0.5 mV (p-p) single-ended results in a Bit Error Rate (BER) of less than 1010.
4. If the input is DC coupled, the preceding amplifier’s output offset voltage should not exceed these limits, in order to
avoid malfunctioning of the DC offset compensation circuit.
5. Specifications guaranteed by design and characterisation. Each device is tested at full operating speed to guarantee
RF functionality.
6.
7. The reference current can be set by connecting a resistor between VCCA and pin RSET. The corresponding input
signal level detect range is from 2 to 12 mV (p-p) single-ended. See Section “Input signal level detection” for detailed
information.
8. RL =50 connected to a level of VCC 2 V (see Fig.9).
9. Internal pull-down resistor of 500 k
to DGND.
10. Internal series resistor of 1 k
.
PECL output pins ST and STQ
VOL
LOW-level output voltage
note 8
VCC 1.84
VCC 1.6
V
VOH
HIGH-level output voltage
note 8
VCC 1.1
VCC 0.9
V
CL
load capacitance
RL = ∞
20
pF
RL =1k
100
pF
RL =50
1000
pF
PECL input pin JAM
VIL
LOW-level input voltage
VCC 1.49
V
VIH
HIGH-level input voltage
VCC 1.165
V
II(JAM)
JAM input current
note 9
20
+20
A
Reference voltage output pin Vref
Vref
reference voltage
note 10
1.165
1.20
1.235
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Input RMS noise
total output RMS noise
low frequency gain
---------------------------------------------------------------
=
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