參數(shù)資料
型號(hào): 935262731557
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8 CHANNEL(S), 500K bps, SERIAL COMM CONTROLLER, PQFP100
封裝: 14 X 14 X 1.40 MM, LQFP-100
文件頁數(shù): 39/59頁
文件大?。?/td> 383K
代理商: 935262731557
Philips Semiconductors
Product specification
SC28L198
Octal UART for 3.3V and 5V supply voltage
1999 Jan 14
44
AC ELECTRICAL CHARACTERISTICS FOR COMMERCIAL AND INDUSTRIAL (5V) (Continued)
VCC = 5.0 volts " 10%; TA = –40 to 85°C; unless otherwise specified
SYMBOL
FIG#
PARAMETER
LIMITS
UNIT
MIN
TYP
MAX
Sclk Timing
tsclkl
Min low time at VIL (0.8V)
11
5
ns
tsclkh
Min high time at VIH (2.0V)
11
5
ns
Fsclk
Sclk frequency
0.1
33
MHz
t/RFsck
Sclk rise and fall time (0.8 to 2.0Volts)
3
ns
X1/X2 Communication Crystal Clock
Fx15
X1 clock frequency
1
3.6864
8.0
MHz
X1 L / H
X1 Low / High time
32
135
ns
T/RFx1
X1 Rise and Fall time
10
ns
Counter/Timer Baud Rate Clock (External Clock Input)
FC/T4
Clock frequency
0
8
MHz
TC/TLH
C/T high and low time
15
11
ns
TC/TO
Delay C/T clock external to output pin
48
60
ns
DTACK Timing
DAKdly
DACK low from Sclk C4 rising edge
10
18
ns
DAKdlya
DACK high from CEN high (Async)
11
20
ns
DAKdlys
DACK high from C4 end rising edge (Sync)
11
20
ns
I/O Port External Clock
tgpirtx
GPI to Rx/Tx clock out
32
50
ns
RxD setup to I/OP rising edge 1X mode
20
2
ns
I/OP falling edge to TxD out 1X mode
32
60
ns
Gout Timing
GPOtdd
GPO valid after write to GPOR
100
ns
NOTES:
1. Timing is illustrated and referenced with respect to W–RN and CEN inputs. Internal read and write activities are controlled by the Sclk as it
generates the several “C” timing as shown in the timing diagrams.
2. The minimum time before the rising edge of the next C2 time to stop the next bus cycle. CEN must return high after midpoint of C4 time and
before the C2 time of the next cycle.
3. Delay is from CEN high in Async mode to IRQN inactive, from end of C4 to IRQN inactive in Sync mode.
4. The minimum frequency values are not tested, but are guaranteed by design.
5. 1MHz specification is for crystal operation.
相關(guān)PDF資料
PDF描述
07CN-70S10L Bus Converter 48V Input / 9.4V Output / 70A
0RCN-70S10L DC-DC REG PWR SUPPLY MODULE
0RCN-70S10LG DC-DC REG PWR SUPPLY MODULE
07CN-70S10LG DC-DC REG PWR SUPPLY MODULE
935262753118 AHC SERIES, 1-INPUT INVERT GATE, PDSO5
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935264217557 制造商:NXP Semiconductors 功能描述:SUB ONLY IC
935267356112 制造商:NXP Semiconductors 功能描述:IC TEA1507PN
935268081112 制造商:NXP Semiconductors 功能描述:SUB ONLY IC
935268721125 制造商:NXP Semiconductors 功能描述:Buffer/Line Driver 1-CH Non-Inverting 3-ST CMOS 5-Pin TSSOP T/R
935269304128 制造商:ST-Ericsson 功能描述:IC AUDIO CODEC W/TCH SCRN 48LQFP