
Philips Semiconductors
Preliminary specification
XA-S3
XA 16-bit microcontroller
32K/1K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I2C, 2 UARTs, 16 MB address range
2000 Mar 09
16
Table 3. A/D Timing Configuration for 10-bit Mode
ADCFG 3 0
Max. Oscillator
Conversion Time
Sampling Time
ADCFG.3–0
Frequency (MHz)
Osc. Clocks
sec at max. Osc.
pg
(Osc. Clocks)
0h (0000)
6.66
88
13.21
4
1h (0001)
8
92
9.2
6
2h (0010)
8
96
8.64
8
3h (0011)
12
116
8.7
8
4h (0100)
12
120
7.2
10
5h (0101)
12
124
6.2
12
6h (0110)
12
136
6.8
24
7h (0111)
12
128
5.77
14
8h (1000)
13
148
6.35
14
9h (1001)
13
152
5.71
16
Ah (1010)
13
156
5.2
18
Bh (1011)
13
170
5.67
32
Ch (1100)
13
160
5.0
20
Dh (1101)
16
180
5.41
20
Eh (1110)
20
204
5.57
22
Fh (1111)
20
208
5.2
24
A/D Inputs
In order to obtain accurate measurements with the A/D Converter,
the source drive must be sufficient to adequately charge the
sampling capacitor during the sampling time. Figure 4 shows the
equivalent resistance and capacitance related to the A/D inputs.
A/D timing configurations indicated in Table 1 allow for full A/D
accuracy (according to the A/D specifications) assuming a source
resistance of less than or equal to 20k
. Larger source resistances
may be accommodated by increasing the sampling time with a
different A/D timing configuration.
RS
VANALOG
INPUT
CS
CC
TO COMPARATOR
+
ADN
ADN+1
SmN+1
SmN
RmN+1
RmN
Multiplexer
Rm (multiplexer resistance)
= 3 k
maximum
CS (pin capacitance)
= 10 pF maximum
CC (sampling capacitor)
= 2 pF maximum
RS (source resistance)
= Recommended less than 20k
for full specified accuracy. This allows time for the sampling
capacitor (CC) to fully charge while the multiplexer switch is closed. Please note that sampling
causes the analog input to present a varying load to the pin.
SU00948
Figure 4. A/D Input: Equivalent Circuit